- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄65576 > IDT5V9352PFI8 (INTEGRATED DEVICE TECHNOLOGY INC) 5V SERIES, PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 PDF資料下載
參數(shù)資料
| 型號： | IDT5V9352PFI8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 5V SERIES, PLL BASED CLOCK DRIVER, 11 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32 |
| 封裝： | TQFP-32 |
| 文件頁數(shù)： | 6/10頁 |
| 文件大?。?/td> | 95K |
| 代理商： | IDT5V9352PFI8 |
5
INDUSTRIALTEMPERATURERANGE
IDT5V9352
3.3V/2.5V PHASE-LOCK LOOP CLOCK DRIVER ZERO DELAY BUFFER
Symbol
Characteristic
Test Conditions
Min.
Typ.
Max.
Unit
tR,tF
Output Rise/Fall Time
0.55V to 2.4V
0.1
1
ns
All Outputs, any frequency
200
tSK(O)
Output to Output Skew
within QA output bank
200
ps
within QB output bank
100
within QC output bank
100
fVCO
PLL VCO Lock Range(2)
200
400
MHz
÷2output
100
200
÷4output
50
100
fMAX
Maximum Output Frequency
÷6output
33.3
66.6
MHz
÷8output
25
50
÷12output
16.67
33.3
tPW
Output Duty Cycle
47
50
53
%
tPD
REFCLK to FBIN Delay
fREF < 40MHz
-200
+150
ps
PLL Locked
fREF > 40MHz, PLL locked
-50
+150
tPLZ
OutputDisableTime
8ns
tPHZ
MR/
OE (LOW-HIGH) to any Q
tPZL
OutputEnableTime
10
ns
tPZH
MR/
OE (HIGH-LOW) to any Q
Outputfrequenciesmixed
400
tJ
Cycle-to-Cycle Jitter
Outputs in any
÷4and ÷6combination
250
ps
All outputs same frequency
100
Outputfrequenciesmixed
200
tJ(PER)
PeriodJitter
Outputs in any
÷4and ÷6combination
150
ps
All outputs same frequency
75
÷4 feedback divider RMS (1σ)15
tJ(
φ)
I/O Phase Jitter
÷6 feedback divider RMS (1σ)20
ps
÷8 feedback divider RMS (1σ)
18-20
÷12 feedback divider RMS (1σ)25
÷4feedback
3 - 10
BW
PLL Closed Loop Bandwidth
÷6feedback
1.5 - 6
MHz
÷8feedback
1 - 3.5
÷12feedback
0.5 - 2
tLOCK
Maximum PLL Lock Time
10
ms
AC ELECTRICAL CHARACTERISTICS(1)
TA = –40°C to +85°C, VCC = 3.3V ± 5%
NOTES:
1. AC characteristics apply for parallel output termination of 50
Ω to VTT.
2. The input frequency on CCLK must match the VCO frequency range divided by the feedback divide ratio FB: freq. = fvco
÷÷÷÷÷ FB.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| IDT5V9910A-5SOG | 5V SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| IDT5V9910A-5SOGI | 5V SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO24 |
| IDT5V991A-2JRC | PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32 |
| IDT5V993A-5QGI8 | PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| IDT5V993A-7QI8 | 5V SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT5V9855-003PFI | 制造商:INT_DEV_TECH 功能描述: |
| IDT5V9885ANLGI | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT5V9885BNLGI | 功能描述:IC CLK GEN 3.3V EEPROM 28-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| IDT5V9885BNLGI8 | 功能描述:IC CLK GEN 3.3V EEPROM 28-VFQFPN RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| IDT5V9885BPFGI | 功能描述:IC CLK GEN 3.3V EEPROM 32TQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。