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參數(shù)資料
| 型號： | IDT5V993A-7QI8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 5V SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| 封裝： | QSOP-28 |
| 文件頁數(shù)： | 3/8頁 |
| 文件大?。?/td> | 76K |
| 代理商： | IDT5V993A-7QI8 |
3
COMMERCIALANDINDUSTRIALTEMPERATURERANGES
IDT5V993A
3.3V PROGRAMMABLE SKEW PLL CLOCK DRIVER TURBOCLOCK
EXTERNALFEEDBACK
By providing external feedback, the IDT5V993A gives users flexibility
with regard to skew adjustment. The FB signal is compared with the
input REF signal at the phase detector in order to drive the VCO. Phase
differences cause the VCO of the PLL to adjust upwards or downwards
accordingly.
NOTES:
1. The device may be operated outside recommended frequency ranges without damage, but functional operation is not guaranteed. Selecting the appropriate FS value based on
input frequency range allows the PLL to operate in its ‘sweet spot’ where jitter is lowest.
2. The level to be set on FS is determined by the nominal operating frequency of the VCO and Time Unit Generator. The VCO frequency always appears at 1Q1:0, 2Q1:0, and the
higher outputs when they are operated in their undivided modes. The frequency appearing at the REF and FB inputs will be the same as the VCO when the output connected
to FB is undivided. The frequency of the REF and FB inputs will be 1/2 or 1/4 the VCO frequency when the part is configured for a frequency multiplication by using a divided
output as the FB input.
3. Skew adjustment range assumes that a zero skew output is used for feedback. If a skewed Q output is used for feedback, then adjustment range will be greater. For example
if a 4tU skewed output is used for feedback, all other outputs will be skewed –4tU in addition to whatever skew value is programmed for those outputs. ‘Max adjustment’ range
applies to output pairs 3 and 4 where ± 6tU skew adjustment is possible and at the lowest FNOM value.
An internal loop filter moderates the response of the VCO to the
phase detector. The loop filter transfer function has been chosen to
provide minimal jitter (or frequency variation) while still providing accu-
rate responses to input frequency changes.
FS = LOW
FS = MID
FS = HIGH
Comments
Timing Unit Calculation (tU)
1/(44 x FNOM)
1/(26 x FNOM)
1/(16 x FNOM)
VCO Frequency Range (FNOM)(1,2)
15 to 35MHz
25 to 60MHz
40 to 85 MHz
Skew Adjustment Range(3)
Max Adjustment:
±9.09ns
±9.23ns
±9.38ns
ns
±49°
±83°
±135°
Phase Degrees
±14%
±23%
±37%
% of Cycle Time
Example 1, FNOM = 15MHz
tU = 1.52ns
—
Example 2, FNOM = 25MHz
tU = 0.91ns
tU = 1.54ns
—
Example 3, FNOM = 30MHz
tU = 0.76ns
tU = 1.28ns
—
Example 4, FNOM = 40MHz
—
tU = 0.96ns
tU = 1.56ns
Example 5, FNOM = 50MHz
—
tU = 0.77ns
tU = 1.25ns
Example 6, FNOM = 80MHz
—
tU = 0.78ns
PLL PROGRAMMABLE SKEW RANGE AND RESOLUTION TABLE
CONTROL SUMMARY TABLE FOR FEEDBACK SIGNALS
nF1:0
Skew (Pair #1, #2)
Skew (Pair #3)
LL(1)
–4tU
Divide by 2
LM
–3tU
–6tU
LH
–2tU
–4tU
ML
–1tU
–2tU
M M
Zero Skew
MH
1tU
2tU
HL
2tU
4tU
HM
3tU
6tU
HH
4tU
Divide by 4
NOTE:
1.
LL disables outputs if TEST = MID and GND/
sOE = HIGH.
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| IDT5V993A-5QG | 5V SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| IDT5V993A-7QGI | 5V SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
| IDT5V993A-2QI | 5V SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 |
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| IDT5V994JI8 | 5V SERIES, PLL BASED CLOCK DRIVER, 8 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC32 |
相關(guān)代理商/技術(shù)參數(shù) |
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| IDT5V994JGI | 功能描述:IC CLK DVR PLL 3.3V PROGR 32PLCC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ Plus 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| IDT5V994JGI8 | 功能描述:IC CLK DVR PLL 3.3V PROGR 32PLCC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ Plus 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
| IDT5V994JI | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT5V994PFGI | 功能描述:IC CLK DVR PLL 3.3V PROGR 32TQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ Plus 標準包裝:2,000 系列:- 類型:PLL 頻率合成器 PLL:是 輸入:晶體 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:1 差分 - 輸入:輸出:無/無 頻率 - 最大:1GHz 除法器/乘法器:是/無 電源電壓:4.5 V ~ 5.5 V 工作溫度:-20°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-LSSOP（0.175"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-SSOP 包裝:帶卷 (TR) 其它名稱:NJW1504V-TE1-NDNJW1504V-TE1TR |
| IDT5V994PFGI8 | 功能描述:IC CLK DVR PLL 3.3V PROGR 32TQFP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:TurboClock™ Plus 標準包裝:1,000 系列:- 類型:時鐘/頻率合成器，扇出分配 PLL:- 輸入:- 輸出:- 電路數(shù):- 比率 - 輸入:輸出:- 差分 - 輸入:輸出:- 頻率 - 最大:- 除法器/乘法器:- 電源電壓:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:56-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:56-VFQFP-EP（8x8） 包裝:帶卷 (TR) 其它名稱:844S012AKI-01LFT |
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