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| 型號(hào)： | IDT7005S70JB |
| 廠(chǎng)商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | DRAM |
| 英文描述： | HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM |
| 中文描述： | 8K X 8 DUAL-PORT SRAM, 70 ns, PQCC68 |
| 封裝： | 0.950 X 0.950 INCH, 0.120 INCH HEIGHT, PLASTIC, LCC-68 |
| 文件頁(yè)數(shù)： | 18/20頁(yè) |
| 文件大?。?/td> | 265K |
| 代理商： | IDT7005S70JB |
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IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
6.06
7
AC TEST CONDITIONS
Input Pulse Levels
GND to 3.0V
Input Rise/Fall Times
5ns Max.
Input Timing Reference Levels
1.5V
Output Reference Levels
1.5V
Output Load
Figure 1 and 2
2738 tbl 12
IDT7005X35
IDT7005X55
IDT7005X70
Mil. Only
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
READ CYCLE
tRC
Read Cycle Time
35
—
55
—
70
—
ns
tAA
Address Access Time
—
35
—
55
—
70
ns
tACE
Chip Enable Access Time
(3)
—35—55
—70
ns
tAOE
Output Enable Access Time
—
20
—
30
—
35
ns
tOH
Output Hold from Address Change
3
—
3
—
3
—
ns
tLZ
Output Low-Z Time
(1, 2)
3—
ns
tHZ
Output High-Z Time
(1, 2)
—15—25
—30
ns
tPU
Chip Enable to Power Up Time
(2)
0—
ns
tPD
Chip Disable to Power Down Time
(2)
—35—50
—50
ns
tSOP
Semaphore Flag Update Pulse (
OE or SEM)
15—15
—15—
ns
tSAA
Semaphore Address Access Time
—
35
—
55
—
70
ns
NOTES:
2738 tbl 13
1. Transition is measured
±500mV from Low or High-impedance voltage with Output Test Load (Figures 2).
2. This parameter is guaranteed by device characterization but not production tested.
3. To access RAM,
CE = VIL and SEM = VIH. To access semaphore, CE = VIH and SEM = VIL.
4. "X" in part numbers indicates power rating (S or L).
1250
30pF
775
DATAOUT
BUSY
INT
5V
1250
5pF
775
DATAOUT
2738 drw 06
Figure 1. AC Output Test Load
Figure 2. Output Load
(For tLZ, tHZ, tWZ, tOW)
Including scope and jig
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(4)
AC ELECTRICAL CHARACTERISTICS OVER THE
IDT7005X15
IDT7005X17
IDT7005X20
IDT7005X25
Com'l. Only
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
READ CYCLE
tRC
Read Cycle Time
15
—
17
—
20
—
25
—
ns
tAA
Address Access Time
—
15
—
17
—
20
—
25
ns
tACE
Chip Enable Access Time
(3)
—
15
—
17
—
20
—
25
ns
tAOE
Output Enable Access Time
—
10
—
10
—
12
—
13
ns
tOH
Output Hold from Address Change
3
—
3
—
3
—
ns
tLZ
Output Low-Z Time
(1, 2)
3
—
3
—
3
—
3
—
ns
tHZ
Output High-Z Time
(1, 2)
10
—
10
—
12
—
15
ns
tPU
Chip Enable to Power Up Time
(2)
0
—
0
—
0
—
ns
tPD
Chip Disable to Power Down Time
(2)
15
—
17
—
20
—
25
ns
tSOP
Semaphore Flag Update Pulse (
OE or SEM)
10
—
10
—
10
—
ns
tSAA
Semaphore Address Access Time
15
—
17
—
20
—
25
ns
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT7005S70L68B | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:x8 Dual-Port SRAM |
| IDT7005S70PF | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM |
| IDT7005S70PFB | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM |
| IDT7005S70XLB | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:x8 Dual-Port SRAM |
| IDT7006 | 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:HIGH-SPEED 16K x 8 DUAL-PORT STATIC RAM |
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