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| 型號： | IDT7016S15PFG |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 16K X 9 DUAL-PORT STATIC RAM |
| 中文描述： | 16K X 9 DUAL-PORT SRAM, 15 ns, PQFP80 |
| 封裝： | 14 X 14 MM, 1.4 MM HEIGHT, GREEN, TQFP-80 |
| 文件頁數(shù)： | 9/20頁 |
| 文件大?。?/td> | 173K |
| 代理商： | IDT7016S15PFG |
6.42
IDT7016S/L
High-Speed 16K x 9 Dual-Port Static RAM Military, Industrial and Commercial Temperature Ranges
AC Elec tric al Charac teristic s Over the
Operating Temperature and Supply Voltage
(5)
9
APRIL 04, 2006
NOTES:
1. Transition is measured 0mV fromLow or High-impedance voltage with the Output Test Load (Figure 2).
2. This parameter is guaranteed by device characterization but not production tested.
3. To access RAM
CE
= V
IL
and
SEM
= V
IH
. To access semaphore,
CE
= V
IH
and
SEM
= V
IL
. Either condition must be valid for the entire t
EW
time.
4. The specification for t
DH
must be met by the device supplying write data to the RAMunder all operating conditions. Although t
DH
and t
OW
values will vary over voltage
and temperature, the actual t
DH
will always be smaller than the actual t
OW
.
5. 'X' in part numbers indicates power rating (S or L).
Symbol
Parameter
7016X12
Com'l Only
7016X15
Com'l Only
Unit
Mn.
Max.
Mn.
Max.
WRITE CYCLE
t
WC
Write Cycle Time
12
____
15
____
ns
t
EW
Chip Enable to End-of-Write
(3)
10
____
12
____
ns
t
AW
Address Valid to End-of-Write
10
____
12
____
ns
t
AS
Address Set-up Time
(3)
0
____
0
____
ns
t
WP
Write Pulse Width
10
____
12
____
ns
t
WR
Write Recovery Time
2
____
2
____
ns
t
DW
Data Valid to End-of-Write
10
____
10
____
ns
t
HZ
Output High-Z Time
(1,2)
____
10
____
10
ns
t
DH
Data Hold Time
(4)
0
____
0
____
ns
t
WZ
Write Enable to Output in High-Z
(1,2)
____
10
____
10
ns
t
OW
Output Active fromEnd-of-Write
(1,2,4)
3
____
3
____
ns
t
SWRD
SEM
Flag Write to Read Time
5
____
5
____
ns
t
SPS
SEM
Flag Contention Window
5
____
5
____
ns
3190 tbl 13a
Symbol
Parameter
7016X20
Com'l, Ind
& Mlitary
7016X25
Com'l &
Mlitary
7016X35
Com'l &
Mlitary
Unit
Min.
Max.
Mn.
Max.
Mn.
Max.
WRITE CYCLE
t
WC
Write Cycle Time
20
____
25
____
35
____
ns
t
EW
Chip Enable to End-of-Write
(3)
15
____
20
____
30
____
ns
t
AW
Address Valid to End-of-Write
15
____
20
____
30
____
ns
t
AS
Address Set-up Time
(3)
0
____
0
____
0
____
ns
t
WP
Write Pulse Width
15
____
20
____
25
____
ns
t
WR
Write Recovery Time
2
____
2
____
2
____
ns
t
DW
Data Valid to End-of-Write
15
____
15
____
15
____
ns
t
HZ
Output High-Z Time
(1,2)
____
12
____
15
____
20
ns
t
DH
Data Hold Time
(4)
0
____
0
____
0
____
ns
t
WZ
Write Enable to Output in High-Z
(1,2)
____
12
____
15
____
20
ns
t
OW
Output Active fromEnd-of-Write
(1,2,4)
3
____
3
____
3
____
ns
t
SWRD
SEM
Flag Write to Read Time
5
____
5
____
5
____
ns
t
SPS
SEM
Flag Contention Window
5
____
5
____
5
____
ns
3190 tbl 13b
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|---|---|
| IDT7016S15PFGB | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 16K X 9 DUAL-PORT STATIC RAM |
| IDT7016S15PFGI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:HIGH-SPEED 16K X 9 DUAL-PORT STATIC RAM |
| IDT7016S17J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Dual-Port SRAM |
| IDT7016S17PF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x9 Dual-Port SRAM |
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