參數(shù)資料
型號: IDT7034L20PF
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: HIGH-SPEED 4K x 18 DUAL-PORT STATIC RAM
中文描述: 4K X 18 DUAL-PORT SRAM, 20 ns, PQFP100
封裝: 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100
文件頁數(shù): 18/19頁
文件大?。?/td> 200K
代理商: IDT7034L20PF
IDT7034S/L
High-Speed 4K x 18 Dual-Port Static RAM Industrial and Commercial Temperature Ranges
18
lower 2K. Meanwhile the right processor was attempting to gain control
of the resource after the left processor, it would read back a one in
response to the zero it had attempted to write into Semaphore 0. At this
point, the software could choose to try and gain control of the second
2K section by writing, then reading a zero into Semaphore 1. If it
succeeded in gaining control, it would lock out the left side.
Once the left side was finished with its task, it would write a one to
Semaphore 0 and may then try to gain access to Semaphore 1. If
Semaphore 1 was still occupied by the right side, the left side could
undo its semaphore request and perform other tasks until it was able
to write, then read a zero into Semaphore 1. If the right processor
performs a similar task with Semaphore 0, this protocol would allow the
two processors to swap 2K blocks of Dual-Port RAM with each other.
The blocks do not have to be any particular size and can even be
variable, depending upon the complexity of the software using the
semaphore flags. All eight semaphores could be used to divide the
Dual-Port RAM or other shared resources into eight parts. Sema-
phores can even be assigned different meanings on different sides
rather than being given a common meaning as was shown in the
example above.
Semaphores are a useful form of arbitration in systems like disk
interfaces where the CPU must be locked out of a section of memory
Figure 4. IDT7034 Semaphore Logic
D
4089 drw 18
0
D
Q
WRITE
D
0
WRITE
D
Q
SEMAPHORE
REQUEST FLIP FLOP
SEMAPHORE
REQUEST FLIP FLOP
L PORT
R PORT
SEMAPHORE
READ
SEMAPHORE
READ
.
during a transfer and the I/O device cannot tolerate any wait states.
With the use of semaphores, once the two devices has determined
which memory area was off-limits to the CPU, both the CPU and the
I/O devices could access their assigned portions of memory continu-
ously without any wait states.
Semaphores are also useful in applications where no memory
WAIT state is available on one or both sides. Once a semaphore
handshake has been performed, both processors can access their
assigned RAM segments at full speed.
Another application is in the area of complex data structures. In this
case, block arbitration is very important. For this application one
processor may be responsible for building and updating a data
structure. The other processor then reads and interprets that data
structure. If the interpreting processor reads an incomplete data
structure, a major error condition may exist. Therefore, some sort of
arbitration must be used between the two different processors. The
building processor arbitrates for the block, locks it and then is able to
go in and update the data structure. When the update is completed,
the data structure block is released. This allows the interpreting
processor to come back and read the complete data structure, thereby
guaranteeing a consistent data structure.
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PDF描述
IDT7034S Low-Noise JFET-Input Operational Amplifier 8-SOIC 0 to 70
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IDT7034S20PF HIGH-SPEED 4K x 18 DUAL-PORT STATIC RAM
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