參數資料
型號: IDT70824L25G
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: DRAM
英文描述: Low-Noise JFET-Input Operational Amplifier 8-SOIC 0 to 70
中文描述: 4K X 16 STANDARD SRAM, 25 ns, CPGA84
封裝: PGA-84
文件頁數: 1/21頁
文件大?。?/td> 205K
代理商: IDT70824L25G
6.07
DSC-3099/5
1
2000 Integrated Device Technology, Inc.
HIGH SPEED 64K (4K X 16 BIT)
SEQUENTIAL ACCESS
RANDOM ACCESS MEMORY (SARAM
)
IDT70824S/L
N
High-speed access
– Mlitary: 35/45ns (max.)
– Commercial: 20/25/35/45ns (max.)
N
Low-power operation
– IDT70824S
Active: 775mW (typ.)
Standby: 5mW (typ.)
– IDT70824L
Active: 775mW (typ.)
Standby: 1mW (typ.)
N
4K x 16 Sequential Access Random Access Memory (SARAM
)
– Sequential Access fromone port and standard Random
Access fromthe other port
– Separate upper-byte and lower-byte control of the
RandomAccess Port
N
High speed operation
– 20ns t
AA
for randomaccess port
– 20ns t
CD
for sequential port
– 25ns clock cycle time
N
Architecture based on Dual-Port RAMcells
N
Compatible with Intel BMIC and 82430 PCI Set
N
Width and Depth Expandable
N
Sequential side
– Address based flags for buffer control
– Pointer logic supports up to two internal buffers
N
Battery backup operation - 2V data retention
N
TTL-compatible, single 5V (+10%) power supply
N
Available in 80-pin TQFP and 84-pin PGA
N
Mlitary product compliant to MIL-PRF-38535 QML
N
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
The IDT70824 is a high-speed 4K x 16-Bit Sequential Access Random
Access Memory (SARAM). The SARAMoffers a single-chip solution to
buffer data sequentially on one port, and be accessed randomy (asyn-
chronously) through the other port. The device has a Dual-Port RAM
based architecture with a standard SRAMinterface for the random
(asynchronous) access port, and a clocked interface with counter se-
Random
Access
Port
Controls
Sequential
Access
Port
Controls
4K X 16
Memory
Array
Data
L
Data
R
Addr
L
Addr
R
I/O
0-15
SI/O
0-15
Pointer/
Counter
12
Start Address for Buffer #1
End Address for Buffer #1
Start Address for Buffer #2
End Address for Buffer #2
Flow Control Buffer
Flag Status
EOB
1
EOB
2
12
12
12
16
12
12
RST
COMPARATOR
LB
UB
A
0-11
CE
OE
R/
W
12
LSB
MSB
CMD
16
RST
SCLK
CNTEN
SOE
SSTRT
1
SSTRT
2
SCE
SR/
W
SLD
16
12
3099 drw 01
Reg.
,
相關PDF資料
PDF描述
IDT70824L25GB Low-Noise JFET-Input Operational Amplifier 8-SOIC 0 to 70
IDT70824L25PF Low-Noise JFET-Input Operational Amplifier 8-PDIP 0 to 70
IDT70824L25PFB Low-Noise JFET-Input Operational Amplifier 8-PDIP 0 to 70
IDT70824S High Speed Low-Noise JFET-Input Dual Operational Amplifier 20-LCCC -55 to 125
IDT70824L20GI HIGH-SPEED 4K X 16 SEQUENTIAL ACCESS RANDOM ACCESS MEMORY (SARAM⑩)
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