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參數(shù)資料
| 型號： | IDT70V27L25PFI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | HIGH-SPEED 3.3V 32K x 16 DUAL-PORT STATIC RAM |
| 中文描述： | 32K X 16 DUAL-PORT SRAM, 25 ns, PQFP100 |
| 封裝： | 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 |
| 文件頁數(shù)： | 18/22頁 |
| 文件大?。?/td> | 192K |
| 代理商： | IDT70V27L25PFI |
Commercial and Industrial Temperature Range
!B$
IDT 70V27S/L
High-Speed 3.3V 32K x 16 Dual-Port Static RAM
'(')<F--
Inputs
18
BUSY
)
NOTES:
1. Pins
BUSY
L
and
BUSY
R
are both outputs when the part is configured as a master. Both are inputs when configured as a slave.
BUSY
outputs on the IDT70V27 are
push-pull, not open drain outputs. On slaves the
BUSY
input internally inhibits writes.
2. "L" if the inputs to the opposite port were stable prior to the address and enable inputs of this port. "H" if the inputs to the opposite port became stable after the address
and enable inputs of this port. If t
APS
is not met, either
BUSY
L
or
BUSY
R
= LOW will result.
BUSY
L
and
BUSY
R
outputs can not be LOW simultaneously.
3. Writes to the left port are internally ignored when
BUSY
L
outputs are driving LOW regardless of actual logic level on the pin. Writes to the right port are internally ignored
when
BUSY
R
outputs are driving LOW regardless of actual logic level on the pin.
4. Refer to Chip Enable Truth Table.
'(')<*F0 1(1G
Functions
!"$
NOTES:
1. This table denotes a sequence of events for only one of the eight semaphores on the IDT70V27.
2. There are eight semaphore flags written to via I/O
0
and read fromall the I/O's (I/O
0
-I/O
15
). These eight semaphores are addressed by A
0
- A
2
.
The IDT70V27 provides two ports with separate control, address and
I/O pins that permt independent access for reads or writes to any location
in memory. The IDT70V27 has an automatic power down feature
controlled by
CE
0
and CE
1
. The
CE
0
and
CE
1
control the on-chip power
down circuitry that permts the respective port to go into a standby mode
when not selected (
CE
HIGH). When a port is enabled, access to the entire
memory array is permtted.
*
If the user chooses the interrupt function, a memory location (mail box
or message center) is assigned to each port. The left port interrupt flag
(
INT
L
) is asserted when the right port writes to memory location 7FFE
(HEX), where a write is defined as
CE
R
= R/
W
R
= V
IL
per the Truth Table
IV. The left port clears the interrupt through access of address location
7FFE when
CE
L
=
OE
L
= V
IL
, R/
W
is a "don't care". Likewise, the right
port interrupt flag (
INT
R
) is asserted when the left port writes to memory
location 7FFF (HEX) and to clear the interrupt flag (
INT
R
), the
right port must read the memory location 7FFF. The message (16 bits) at
7FFE or 7FFF is user-defined since it is an addressable SRAMlocation.
If the interrupt func-tion is not used, address locations 7FFE and 7FFF are
not used as mail boxes, but as part of the randomaccess memory. Refer
to Truth Table IV for the interrupt operation.
;9
Busy Logic provides a hardware indication that both ports of the RAM
have accessed the same location at the same time. It also allows one of the
two accesses to proceed and signals the other side that the RAMis
“
Busy
”
.
The
BUSY
pin can then be used to stall the access until the operation on
Outputs
Function
CE
L
CE
R
A
0L
-A
14L
A
0R
-A
14R
BUSY
L
(1)
BUSY
R
(1)
X
X
NO MATCH
H
H
Normal
H
X
MATCH
H
H
Normal
X
H
MATCH
H
H
Normal
L
L
MATCH
(2)
(2)
Write Inhibit
(3)
3603 tbl 17
D0 - D15 Left
D
0
- D
15
Right
Status
No Action
1
1
Semaphore free
Left Port Writes "0" to Semaphore
0
1
Left port has semaphore token
Right Port Writes "0" to Semaphore
0
1
No change. Right side has no write access to semaphore
Left Port Writes "1" to Semaphore
1
0
Right port obtains semaphore token
Left Port Writes "0" to Semaphore
1
0
No change. Left port has no write access to semaphore
Right Port Writes "1" to Semaphore
0
1
Left port obtains semaphore token
Left Port Writes "1" to Semaphore
1
1
Semaphore free
Right Port Writes "0" to Semaphore
1
0
Right port has semaphore token
Right Port Writes "1" to Semaphore
1
1
Semaphore free
Left Port Writes "0" to Semaphore
0
1
Left port has semaphore token
Left Port Writes "1" to Semaphore
1
1
Semaphore free
3603 tbl 18
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