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參數(shù)資料
| 型號(hào)： | IDT71V124SA12Y |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | DRAM |
| 英文描述： | 3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power & Ground Pinout |
| 中文描述： | 128K X 8 STANDARD SRAM, 12 ns, PDSO32 |
| 封裝： | 0.400 INCH, PLASTIC, SOJ-32 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 81K |
| 代理商： | IDT71V124SA12Y |
6
IDT71V124SA, 3.3V CMOS Static RAM
1 Meg (128K x 8-Bit) Center Power & Ground Pinout Commercial and Industrial Temperature Ranges
Timing Waveform of Write Cycle No. 1 (
WE
Controlled Timing)
(1,2,4)
Timing Waveform of Write Cycle No. 2 (
CS
Controlled Timing)
(1, 4)
NOTES:
1. A write occurs during the overlap of a LOW
CS
and a LOW
WE
.
2.
OE
is continuously HIGH. During a
WE
controlled write cycle with
OE
LOW, t
WP
must be greater than or equal to t
WHZ
+ t
DW
to allow the I/O drivers to turn off and data to be
placed on the bus for the required t
DW
. If
OE
is HIGH during a
WE
controlled write cycle, this requirement does not apply and the mnimumwrite pulse is the specified t
WP
.
3. During this period, I/O pins are in the output state, and input signals must not be applied.
4. If the
CS
LOW transition occurs simultaneously with or after the
WE
LOW transition, the outputs remain in a high impedance state.
CS
must be active during the t
CW
write period.
5. Transition is measured ±200mV fromsteady state.
ADDRESS
CS
WE
DATA
OUT
DATA
IN
3873 drw 07
(5)
(2)
(5)
(5)
DATA
IN
VALID
HIGH IMPEDANCE
t
WC
t
AW
t
AS
t
WHZ
t
WP
t
CHZ
t
OW
t
DW
t
DH
t
WR
(3)
(3)
.
CS
ADDRESS
DATA
IN
3873 drw 08
t
AW
t
WC
t
CW
t
AS
t
WR
t
DW
t
DH
DATA
IN
VALID
WE
(3)
.
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| IDT71V124SA | 3.3V CMOS Static RAM 1 Meg (128K x 8-Bit) Center Power & Ground Pinout |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT71V124SA12Y8 | 功能描述:IC SRAM 1MBIT 12NS 32SOJ RoHS:否 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 產(chǎn)品變化通告:Product Discontinuation 05/Nov/2008 標(biāo)準(zhǔn)包裝:84 系列:- 格式 - 存儲(chǔ)器:RAM 存儲(chǔ)器類型:SRAM - 同步 ZBT 存儲(chǔ)容量:4.5M（128K x 36） 速度:75ns 接口:并聯(lián) 電源電壓:3.135 V ~ 3.465 V 工作溫度:-40°C ~ 85°C 封裝/外殼:119-BGA 供應(yīng)商設(shè)備封裝:119-PBGA（14x22） 包裝:托盤 其它名稱:71V3557SA75BGI |
| IDT71V124SA12YG | 功能描述:IC SRAM 1MBIT 12NS 32SOJ RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:1K (128 x 8) 速度:100kHz 接口:UNI/O?（單線） 電源電壓:1.8 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應(yīng)商設(shè)備封裝:8-MSOP 包裝:帶卷 (TR) |
| IDT71V124SA12YG8 | 功能描述:IC SRAM 1MBIT 12NS 32SOJ RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:60 系列:- 格式 - 存儲(chǔ)器:EEPROMs - 串行 存儲(chǔ)器類型:EEPROM 存儲(chǔ)容量:16K (2K x 8) 速度:2MHz 接口:SPI 3 線串行 電源電壓:2.5 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 封裝/外殼:8-DIP（0.300"，7.62mm） 供應(yīng)商設(shè)備封裝:8-PDIP 包裝:管件 產(chǎn)品目錄頁面:1449 (CN2011-ZH PDF) |
| IDT71V124SA12YGI | 功能描述:IC SRAM 1MBIT 12NS 32SOJ RoHS:是 類別:集成電路 (IC) >> 存儲(chǔ)器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 格式 - 存儲(chǔ)器:閃存 存儲(chǔ)器類型:閃存 - NAND 存儲(chǔ)容量:4G（256M x 16） 速度:- 接口:并聯(lián) 電源電壓:2.7 V ~ 3.6 V 工作溫度:0°C ~ 70°C 封裝/外殼:48-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商設(shè)備封裝:48-TSOP I 包裝:Digi-Reel® 其它名稱:557-1461-6 |
| IDT71V124SA12YGI8 | 制造商:Integrated Device Technology Inc 功能描述:IC SRAM 1MBIT 12NS 32SOJ |
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