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參數(shù)資料
| 型號： | IDT7281L15PA8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 7/12頁 |
| 文件大小： | 0K |
| 描述： | IC MEM FIFO 512X9 15NS 56-TSSOP |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 系列： | 7200 |
| 功能： | 異步 |
| 存儲容量： | 4.6K（512 x 9） |
| 數(shù)據(jù)速率： | 40MHz |
| 訪問時間： | 15ns |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 56-TFSOP（0.240"，6.10mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 56-TSSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 7281L15PA8 |
4
COMMERCIALTEMPERATURERANGE
IDT7280/7281/7282/7283/7284/7285 5V ASYNCHRONOUS FIFO
DUAL 256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
JUNE 29, 2012
SIGNAL DESCRIPTIONS
INPUTS:
DATA IN (D0 – D8)
Data inputs for 9-bit wide data.
CONTROLS:
RESET (RS)
ResetisaccomplishedwhenevertheReset(RS)inputistakentoaLOWstate.
During reset, both internal read and write pointers are set to the first location.
Aresetisrequiredafterpowerupbeforeawriteoperationcantakeplace.Both
the Read Enable (R) and Write Enable (W) inputs must be in the HIGH
state during the window shown in Figure 2, (i.e., tRSS before the rising
edge of RS) and should not change until tRSR after the rising edge of
RS. Half-Full Flag (HF) will be reset to HIGH after Reset (RS).
WRITE ENABLE (W)
A write cycle is initiated on the falling edge of this input if the Full Flag (FF)
isnotset.Dataset-upandholdtimesmustbeadheredtowithrespecttotherising
edgeoftheWriteEnable(W).DataisstoredintheRAMarraysequentiallyand
independently of any on-going read operation.
After half of the memory is filled and at the falling edge of the next write
operation,theHalf-FullFlag(HF)willbesettoLOWandwillremainsetuntilthe
difference between the write pointer and read pointer is less than or equal to
onehalfofthetotalmemoryofthedevice.TheHalf-FullFlag(HF)isthenreset
by the rising edge of the read operation.
Topreventdataoverflow,theFullFlag(FF)willgoLOW,inhibitingfurther
write operations. Upon the completion of a valid read operation, the Full Flag
(FF) will go HIGH after tRFF, allowing a valid write to begin. When the FIFO is
full, the internal write pointer is blocked from W, so external changes in Wwill
notaffecttheFIFOwhenitisfull.
READ ENABLE (R)
AreadcycleisinitiatedonthefallingedgeoftheReadEnable(R)provided
theEmptyFlag(EF)isnotset.ThedataisaccessedonaFirst-In/First-Outbasis,
independent of any ongoing write operations. After Read Enable (R) goes
HIGH,theDataOutputs(Q0–Q8)willreturntoahighimpedanceconditionuntil
thenextReadoperation.WhenalldatahasbeenreadfromtheFIFO,theEmpty
Flag (EF) will go LOW, allowing the “final” read cycle but inhibiting further read
operations with the data outputs remaining in a high impedance state. Once a
valid write operation has been accomplished, the Empty Flag (EF)willgoHIGH
aftertWEFandavalidReadcanthenbegin.WhentheFIFOisempty,theinternal
read pointer is blocked from Rso external changes in Rwill not affect the FIFO
when it is empty.
FIRST LOAD/RETRANSMIT (FL/RT)
This is a dual-purpose input. In the Depth Expansion Mode, this pin is
groundedtoindicatethatitisthefirstloaded(seeOperatingModes). IntheSingle
DeviceMode,thispinactsastheretransmitinput.TheSingleDeviceModeis
initiated by grounding the Expansion In (XI).
ThesedevicescanbemadetoretransmitdatawhentheRetransmitEnable
control(RT)inputispulsedLOW. Aretransmitoperationwillsettheinternalread
pointertothefirstlocationandwillnotaffectthewritepointer.ReadEnable(R)
andWriteEnable(W)mustbeintheHIGHstateduringretransmit.Thisfeature
is useful when less than 256/512/1,024/2,048/4,096/8,192 writes are per-
formedbetweenresets.TheretransmitfeatureisnotcompatiblewiththeDepth
Expansion Mode and will affect the Half-Full Flag (HF), depending on the
relative locations of the read and write pointers.
EXPANSION IN (XI)
Thisinputisadual-purposepin. ExpansionIn(XI)isgroundedtoindicate
an operation in the single device mode. Expansion In (XI) is connected to
Expansion Out (XO) of the previous device in the Depth Expansion or Daisy
Chain Mode.
OUTPUTS:
FULL FLAG (FF)
TheFullFlag(FF)willgoLOW,inhibitingfurtherwriteoperation,whenthe
write pointer is one location less than the read pointer, indicating that the
deviceisfull.IfthereadpointerisnotmovedafterReset(RS),theFull-Flag(FF)
will go LOW after 256 writes for IDT7280, 512 writes for the IDT7281, 1,024
writes for the IDT7282, 2,048 writes for the IDT7283, 4,096 writes for the
IDT7284 and 8,192 writes for the IDT7285.
EMPTY FLAG (EF)
TheEmptyFlag(EF)willgoLOW,inhibitingfurtherreadoperations,when
the read pointer is equal to the write pointer, indicating that the device is
empty.
EXPANSION OUT/HALF-FULL FLAG (XO/HF)
This is a dual-purpose output. In the single device mode, when Expan-
sionIn(XI)isgrounded,thisoutputactsasanindicationofahalf-fullmemory.
After half of the memory is filled and at the falling edge of the next write
operation,theHalf-FullFlag(HF)willbesetLOWandwillremainsetuntilthe
difference between the write pointer and read pointer is less than or equal
toonehalfofthetotalmemoryofthedevice.TheHalf-FullFlag(HF)isthenreset
by using rising edge of the read operation.
IntheDepthExpansionMode,ExpansionIn(XI)isconnectedtoExpansion
Out(XO)ofthepreviousdevice.Thisoutputactsasasignaltothenextdevice
in the Daisy Chain by providing a pulse to the next device when the previous
devicereachesthelastlocationofmemory.
DATA OUTPUTS (Q0 – Q8)
Data outputs for 9-bit wide data. This data is in a high impedance
condition whenever Read (R) is in a HIGH state.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT7281L15PAGI | 制造商:Integrated Device Technology Inc 功能描述:IC MEM FIFO 512X9 15NS 56-TSSOP |
| IDT7281L15PAGI8 | 制造商:Integrated Device Technology Inc 功能描述:IC MEM FIFO 512X9 15NS 56-TSSOP |
| IDT7281L15PAI | 功能描述:IC MEM FIFO 512X9 15NS 56-TSSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT7281L15PAI8 | 功能描述:IC MEM FIFO 512X9 15NS 56-TSSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
| IDT7281L20PA | 功能描述:IC MEM FIFO 512X9 20NS 56-TSSOP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:7200 標(biāo)準(zhǔn)包裝:80 系列:7200 功能:同步 存儲容量:18.4K（1K x 18） 數(shù)據(jù)速率:- 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（10x10） 包裝:托盤 其它名稱:72225LB10TF |
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