參數(shù)資料
型號(hào)： IDT72V201L15PF
廠商： IDT, Integrated Device Technology Inc
文件頁(yè)數(shù)： 12/14頁(yè)
文件大?。?/td> 0K
描述： IC FIFO SYNC 256X9 15NS 32-TQFP
標(biāo)準(zhǔn)包裝： 50
系列： 72V
功能： 同步
存儲(chǔ)容量： 2.3K（256 x 9）
訪(fǎng)問(wèn)時(shí)間： 15ns
電源電壓： 3 V ~ 3.6 V
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 32-LQFP
供應(yīng)商設(shè)備封裝： 32-TQFP（7x7）
包裝： 托盤(pán)
其它名稱(chēng)： 72V201L15PF
7
IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO
256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
OUTPUTS:
FULL FLAG (FF)
TheFullFlag(FF)willgoLOW,inhibitingfurtherwriteoperation,whenthe
device is full. If no reads are performed after Reset (RS), the Full Flag (FF)
willgoLOWafter256writesfortheIDT72V201,512writesfortheIDT72V211,
1,024writesfortheIDT72V221,2,048writesfortheIDT72V231,4,096writes
for the IDT72V241 and 8,192 writes for the IDT72V251.
The Full Flag (FF) is synchronized with respect to the LOW-to-HIGH
transitionoftheWriteClock(WCLK).
EMPTY FLAG (EF)
TheEmptyFlag(EF)willgoLOW,inhibitingfurtherreadoperations,when
the read pointer is equal to the write pointer, indicating the device is empty.
The Empty Flag (EF) is synchronized with respect to the LOW-to-HIGH
transition of the Read Clock (RCLK).
PROGRAMMABLE ALMOST-FULL FLAG (PAF)
The Programmable Almost-Full flag (PAF) will go LOW when the FIFO
reachesthealmost-fullcondition.IfnoreadsareperformedafterReset(RS),
theProgrammableAlmost-Fullflag(PAF)willgoLOWafter (256-m)writesfor
the IDT72V201, (512-m) writes for the IDT72V211, (1,024-m) writes for the
IDT72V221, (2,048-m) writes for the IDT72V231, (4,096-m) writes for the
IDT72V241and(8,192-m)writesfortheIDT72V251. Theoffset“m”isdefined
intheFullOffsetregisters.
Ifthereisnofulloffsetspecified,theProgrammableAlmost-Fullflag(PAF)
will go LOW at Full-7 words.
TheProgrammableAlmost-Fullflag(PAF)issynchronizedwithrespectto
theLOW-to-HIGHtransitionoftheWriteClock(WCLK).
PROGRAMMABLEALMOST-EMPTYFLAG(PAE)
TheProgrammableAlmost-Emptyflag(PAE)willgoLOWwhentheread
pointer is "n+1" locations less than the write pointer. The offset "n" is defined
in the Empty Offset registers. If no reads are performed after Reset the
Programmable Almost-Empty flag (PAE) will go HIGH after "n+1" for the
IDT72V201/72V211/72V221/72V231/72V241/72V251.
Ifthereisnoemptyoffsetspecified,theProgrammableAlmost-Emptyflag
(PAE) will go LOW at Empty+7 words.
TheProgrammableAlmost-Emptyflag(PAE)issynchronizedwithrespect
to the LOW-to-HIGH transition of the Read Clock (RCLK).
DATA OUTPUTS (Q0 - Q8)
Data outputs for a 9-bit wide data.
NUMBER OF WORDS IN FIFO
IDT72V201
IDT72V211
IDT72V221
FF
PAF
PAE
EF
00
0
H
L
1 to n(1)
1 to n(1)
HH
L
H
(n+1)to(256-(m+1))
(n+1)to(512-(m+1))
(n+1)to(1,024-(m+1))
HHHH
(256-m)(2)to255
(512-m)(2)to511
(1,024-m)(2)to1,023
H
L
H
256
512
1,024
L
H
NUMBER OF WORDS IN FIFO
IDT72V231
IDT72V241
IDT72V251
FF
PAF
PAE
EF
000
H
L
1 to n(1)
HH
L
H
(n+1)to(2,048-(m+1))
(n+1)to(4,096-(m+1))
(n+1)to(8,192-(m+1))
HHHH
(2,048-m)(2)to2,047
(4,096-m)(2) to4,095
(8,192-m)(2) to8,191
H
L
H
2,048
4,096
8,192
L
H
NOTES:
1. n = Empty Offset (n = 7 default value)
2. m = Full Offset (m = 7 default value)
TABLE 1 — STATUS FLAGS
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