參數(shù)資料
型號(hào): IDT72V201L15PF
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 9/14頁(yè)
文件大?。?/td> 0K
描述: IC FIFO SYNC 256X9 15NS 32-TQFP
標(biāo)準(zhǔn)包裝: 50
系列: 72V
功能: 同步
存儲(chǔ)容量: 2.3K(256 x 9)
訪問(wèn)時(shí)間: 15ns
電源電壓: 3 V ~ 3.6 V
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 32-LQFP
供應(yīng)商設(shè)備封裝: 32-TQFP(7x7)
包裝: 托盤
其它名稱: 72V201L15PF
IDT72V201/72V211/72V221/72V231/72V241/72V251 3.3V CMOS SyncFIFO
256 x 9, 512 x 9, 1,024 x 9, 2,048 x 9, 4,096 x 9 and 8,192 x 9
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
4
*Includes jig and scope capacitances.
AC TEST CONDITIONS
In Pulse Levels
GND to 3.0V
InputRise/FallTimes
3ns
InputTimingReferenceLevels
1.5V
OutputReferenceLevels
1.5V
OutputLoad
See Figure 1
or equivalent circuit
Figure 1. Output Load
AC ELECTRICAL CHARACTERISTICS(1)
(Commercial: VCC = 3.3 ±0.3V, TA = 0
°C to + 70°C;Industrial: VCC = 3.3 ±0.3V, TA = -40°C to + 85°C)
NOTES:
1. Pulse widths less than minimum values are not allowed.
2. Industrial temperature range is available by special order for speed grades faster than 15ns.
3. Values guaranteed by design, not currently tested.
Commercial
Com'l & Ind'l(2)
Commercial
IDT72V201L10
IDT72V201L15
IDT72V201L20
IDT72V211L10
IDT72V211L15
IDT72V211L20
IDT72V221L10
IDT72V221L15
IDT72V221L20
IDT72V231L10
IDT72V231L15
IDT72V231L20
IDT72V241L10
IDT72V241L15
IDT72V241L20
IDT72V251L10
IDT72V251L15
IDT72V251L20
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Unit
fS
Clock Cycle Frequency
100
66.7
50
MHz
tA
DataAccessTime
2
6.5
2
10
2
12
ns
tCLK
Clock Cycle Time
10
15
20
ns
tCLKH
Clock High Time
4.5
6
8
ns
tCLKL
Clock Low Time
4.5
6
8
ns
tDS
DataSetupTime
3
4
5
ns
tDH
DataHoldTime
0.5
1
1
ns
tENS
EnableSetupTime
3
4
5
ns
tENH
EnableHoldTime
0.5
1
1
ns
tRS
ResetPulseWidth(1)
10
15
20
ns
tRSS
ResetSetupTime
8
10
12
ns
tRSR
Reset Recovery Time
8
10
12
ns
tRSF
ResettoFlagandOutputTime
10
15
20
ns
tOLZ
OutputEnabletoOutputinLow-Z(3)
0—
0
0—
ns
tOE
OutputEnabletoOutputValid
3
3
8
3
10
ns
tOHZ
OutputEnabletoOutputinHigh-Z(3)
3—
3
8
310
ns
tWFF
Write Clock to Full Flag
6.5
10
12
ns
tREF
Read Clock to Empty Flag
6.5
10
12
ns
tAF
Write Clock to Almost-Full Flag
6.5
10
12
ns
tAE
Read Clock to Almost-Empty Flag
6.5
10
12
ns
tSKEW1
Skew time between Read Clock & Write
5
6
8
ns
Clock for Empty Flag &Full Flag
tSKEW2
Skew time between Read Clock & Write
14
18
20
ns
Clock for Almost-Empty Flag &
Almost-FullFlag
30pF*
D.U.T.
4092 drw03
3.3V
330
Ω
510
Ω
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