IDT72V223/233/243/253/263/273/283/293 3.3V HIGH DENSITY SUPERSYNC II
參數(shù)資料
型號： IDT72V263L7-5PF8
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 15/45頁
文件大?。?/td> 0K
描述： IC FIFO 8192X18 7-5NS 80QFP
標準包裝： 750
系列： 72V
功能： 異步，同步
存儲容量： 144K（8K x 18）
數(shù)據(jù)速率： 133MHz
訪問時間： 5ns
電源電壓： 3.15 V ~ 3.45 V
工作溫度： 0°C ~ 70°C
安裝類型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-TQFP（14x14）
包裝： 帶卷 (TR)
其它名稱： 72V263L7-5PF8
22
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
IDT72V223/233/243/253/263/273/283/293 3.3V HIGH DENSITY SUPERSYNC IITM NARROW BUS FIFO
512 x 18, 1K x 9/18, 2K x 9/18, 4K x 9/18, 8K x 9/18, 16K x 9/18, 32K x 9/18, 64K x 9/18, 128K x 9
FEBRUARY 11, 2009
IDT72V263, (32,768-m) writes for the IDT72V273, (65,536-m) writes for the
IDT72V283 and (131,072-m) writes for the IDT72V293. The offset “m” is the
full offset value. The default setting for this value is stated in Table 2.
In FWFT mode, if x18 Input or x18 Output bus Width is selected, the
PAF
will go LOW after (513-m) writes for the IDT72V223, (1,025-m) writes for the
IDT72V233, (2,049-m) writes for the IDT72V243, (4,097-m) writes for the
IDT72V253, (8,193-m) writes for the IDT72V263, (16,385-m) writes for the
IDT72V273, (32,769-m) writes for the IDT72V283 and (65,537-m) writes for
theIDT72V293.Ifbothx9Inputandx9OutputbusWidthsareselected,the
PAF
will go LOW after (1,025-m) writes for the IDT72V223, (2,049-m) writes for the
IDT72V233, (4,097-m) writes for the IDT72V243, (8,193-m) writes for the
IDT72V253, (16,385-m) writes for the IDT72V263, (32,769-m) writes for the
IDT72V273, (65,537-m) writes for the IDT72V283 and (131,073-m) writes for
the IDT72V293. The offset m is the full offset value. The default setting for this
value is stated in Table 2.
See Figure 18, Synchronous Programmable Almost-Full Flag Timing (IDT
Standard and FWFT Mode), for the relevant timing information.
If asynchronous
PAF configurationisselected,the PAF isassertedLOW
ontheLOW-to-HIGHtransitionoftheWriteClock(WCLK).
PAFisresettoHIGH
ontheLOW-to-HIGHtransitionoftheReadClock(RCLK).Ifsynchronous
PAF
configuration is selected, the
PAFisupdatedontherisingedgeofWCLK.See
Figure 20 for Asynchronous Programmable Almost-Full Flag Timing (IDT
Standard and FWFT Mode).
PROGRAMMABLE ALMOST-EMPTY FLAG (
PAE)
The Programmable Almost-Empty flag (
PAE)willgoLOWwhentheFIFO
reaches the almost-empty condition. In IDT Standard mode, PAE will go LOW
when there are n words or less in the FIFO. The offset “n” is the empty offset
value. The default setting for this value is stated in Table 2.
In FWFT mode, the
PAE will go LOW when there are n+1 words or less
in the FIFO. The default setting for this value is stated in Table 2.
See Figure 19, Synchronous Programmable Almost-Empty Flag Timing
(IDT Standard and FWFT Mode), for the relevant timing information.
If asynchronous
PAEconfigurationisselected,the PAEisassertedLOW
ontheLOW-to-HIGHtransitionoftheReadClock(RCLK).
PAEisresettoHIGH
ontheLOW-to-HIGHtransitionoftheWriteClock(WCLK).Ifsynchronous
PAE
configuration is selected, the
PAEisupdatedontherisingedgeofRCLK.See
Figure 21, Asynchronous Programmable Almost-Empty Flag Timing (IDT
Standard and FWFT Mode), for the relevant timing information.
HALF-FULL FLAG (
HF)
Thisoutputindicatesahalf-fullFIFO.TherisingWCLKedgethatfillstheFIFO
beyondhalf-fullsets
HFLOW.TheflagremainsLOWuntilthedifferencebetween
the write and read pointers becomes less than or equal to half of the total depth
of the device; the rising RCLK edge that accomplishes this condition sets
HF
HIGH.
InIDTStandardmode,ifnoreadsareperformedafterreset(
MRSorPRS),
HF will go LOW after (D/2 + 1) writes to the FIFO. If x18 Input or x18 Output
bus Width is selected, D = 512 for the IDT72V223, 1,024 for the IDT72V233,
2,048 for the IDT72V243, 4,096 for the IDT72V253, 8,192 for the IDT72V263,
16,384 for the IDT72V273, 32,768 for the IDT72V283 and 65,536 for the
IDT72V293. If both x9 Input and x9 Output bus Widths are selected, D = 1,024
for the IDT72V223, 2,048 for the IDT72V233, 4,096 for the IDT72V243, 8,192
for the IDT72V253, 16,384 for the IDT72V263, 32,768 for the IDT72V273,
65,536 for the IDT72V283 and 131,072 for the IDT72V293.
In FWFT mode, if no reads are performed after reset (
MRS or PRS), HF
will go LOW after (D-1/2 + 2) writes to the FIFO. If x18 Input or x18 Output bus
Width is selected, D = 513 for the IDT72V223, 1,025 for the IDT72V233, 2,049
fortheIDT72V243,4,097fortheIDT72V253,8,193fortheIDT72V263,16,385
for the IDT72V273, 32,769 for the IDT72V283 and 65,537 for the IDT72V293.
If both x9 Input and x9 Output bus Widths are selected, D = 1,025 for the
IDT72V223, 2,049 for the IDT72V233, 4,097 for the IDT72V243, 8,193 for the
IDT72V253, 16,385 for the IDT72V263, 32,769 for the IDT72V273, 65,537 for
the IDT72V283 and 131,073 for the IDT72V293.
See Figure 22, Half-Full Flag Timing (IDT Standard and FWFT Mode),
for the relevant timing information. Because
HFisupdatedbybothRCLKand
WCLK, it is considered asynchronous.
DATA OUTPUTS (Q0-Qn)
(Q0 - Q17) data outputs for 18-bit wide data or (Q0 - Q8) data outputs for 9-
bit wide data.
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IDT72V263L7-5PFI 功能描述:IC FIFO 8192X18 7-5NS 80QFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT72V265LA10PF 功能描述:IC FIFO SS 16384X18 10NS 64-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT72V265LA10PF8 功能描述:IC FIFO SS 16384X18 10NS 64-TQFP RoHS:否 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
IDT72V265LA10PFG 功能描述:IC FIFO SS 16384X18 10NS 64-TQFP RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標準包裝:90 系列:74ABT 功能:同步，雙端口 存儲容量:4.6K（64 x 36 x2） 數(shù)據(jù)速率:67MHz 訪問時間:- 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:120-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:120-HLQFP（14x14） 包裝:托盤 產(chǎn)品目錄頁面:1005 (CN2011-ZH PDF) 其它名稱:296-3984
IDT72V265LA10PFG8 功能描述:IC FIFO SS 16384X18 10NS 64-TQFP RoHS:是 類別:集成電路 (IC) >> 邏輯 - FIFO 系列:72V 標準包裝:90 系列:7200 功能:同步 存儲容量:288K（16K x 18） 數(shù)據(jù)速率:100MHz 訪問時間:10ns 電源電壓:4.5 V ~ 5.5 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:64-LQFP 供應(yīng)商設(shè)備封裝:64-TQFP（14x14） 包裝:托盤 其它名稱:72271LA10PF
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