參數(shù)資料
型號(hào): IDT72V51256L7-5BBI
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 37/56頁(yè)
文件大小: 0K
描述: IC FLOW CTRL MULTI QUEUE 256-BGA
標(biāo)準(zhǔn)包裝: 1
類型: 多隊(duì)列流量控制
安裝類型: 表面貼裝
封裝/外殼: 256-BBGA
供應(yīng)商設(shè)備封裝: 256-BGA(17x17)
包裝: 托盤
其它名稱: 72V51256L7-5BBI
42
IDT72V51236/72V51246/72V51256 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(4 QUEUES) 36 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
COMMERCIALANDINDUSTRIAL
TEMPERATURERANGES
RSOP
(Q34)
REOP
(Q35)
tPR
tA
tENS
REN
Q0-Q31
P1Wo
P1Wn
P1W1
RAEOP/
RMOD1
(Q33)
PR
RMOD2
(Q32)
RCLK
P1Wn
-1
P1Wn
-2
P1Wn
-3
*A*
*B*
*D*
*E*
5937
drw22
OV
tROV
tA
P1W2
*C*
Figure
19.
Data
Output
(Receive)
Packet
Mode
of
Operation
NOTE:
1
.
In
Packet
mode,
words
cannot
be
read
from
a
queue
until
a
complete
packet
has
been
written
into
that
queue,
regardless
of
REN
.
2
.
The
PR
flag
will
go
HIGH
on
cycle
*C*
regardless
of
REN.
3
.
The
OV
flag
will
go
HIGH
(preventing
further
reads),
when
the
last
complete
packet
has
been
read
out.
If
there
is
a
partial
packet
(a
nincomplete
packet)
in
the
queue
the
OV
flag
will
remain
HIGH
until
further
writes
have
completed
the
packet.
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