參數(shù)資料
型號(hào)： IDT74GTLP16612PA8
廠商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類： 總線收發(fā)器
英文描述： GTLP SERIES, 18-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56
封裝： TSSOP-56
文件頁數(shù)： 2/8頁
文件大?。?/td> 72K
代理商： IDT74GTLP16612PA8
2
INDUSTRIALTEMPERATURERANGE
IDT74GTLP16612
CMOS 18-BIT TTL/GTLP UNIVERSAL BUS TRANSCEIVER
SSOP/ TSSOP
TOP VIEW
PIN CONFIGURATION
OEAB
A1
GND
VCC (3.3V)
GNDQ
GND
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
48
49
50
51
52
53
54
55
56
1
GND
25
26
27
28
32
31
30
29
LEAB
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A16
A17
A18
CEAB
GND
B1
GND
VREF
GND
CLKAB
B2
B3
B4
B5
B6
B8
B9
B10
B11
B12
B13
B14
B15
B16
CLKBA
B7
A12
A13
A14
A15
CEBA
OEBA
LEBA
B17
B18
VCC (3.3V)
VCCQ (5V)
ABSOLUTE MAXIMUM RATINGS(1,2)
Symbol
Rating
Max.
Unit
VCC
Supply Voltage
–0.5 to +7
V
VCCQ
VI
DC Input Voltage
–0.5 to +7
V
VO
DC Output Voltage, 3-State
–0.5 to +7
V
VO
DC Output Voltage, Active
–0.5 to VCC + 0.5
V
IOL
DC Output Sink Current into A-port
64
mA
IOH
DC Output Source Current from A-port
–64
mA
IOL
DC Output Sink Current into B-port
80
mA
(in the LOW state)
IIK
DC Input Diode Current VI < 0V
–50
mA
IOK
DC Output Diode Current VO < 0V
–50
mA
IOK
DC Output Diode Current VO > VCC
+50
mA
TSTG
StorageTemperature
–65 to +150
° C
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
2. Unused inputs without Bus-Hold must be held HIGH or LOW.
PIN DESCRIPTION
Pin Names
Description(1)
OEAB
A-to-B Output Enable (Active LOW)
OEBA
B-to-A Output Enable (Active LOW)
CEAB
A-to-B Clock Enable (Active LOW)
CEBA
B-to-A Clock Enable (Active LOW)
LEAB
A-to-B Latch Enable (Transparent HIGH)
LEBA
B-to-A Latch Enable (Transparent HIGH)
CLKAB
A-to-B Clock Pulse
CLKBA
B-to-A Clock Pulse
VREF
GTLP Input Reference Voltage
A1 - A18
A-to-B TTL Data Inputs or B-to-A 3-State Outputs
B1 - B18
B-to-A GTLP Data Inputs or A-to-B Open Drain Outputs
NOTE:
1. A-Port pins have Bus-Hold. All other pins are standard input, output, or I/O.
CAPACITANCE (TA = +25°C, f = 1.0MHZ)
Symbol
Parameter(1)
Conditions
Typ.(2)
Max.
Unit
CIN
Control Pins
VI = VCCQ or 0
8
—
pF
CI/O
A-Port
VI = VCCQ or 0
9
—
pF
CI/O
B-Port
VI = VCCQ or 0
6
—
pF
NOTES:
1. As applicable to the device type.
2. All typical values are at VCC = 3.3V and VCCQ = 5V.
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