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參數(shù)資料
| 型號： | IDT77911 |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | Octal Transceivers And Line/MOS Drivers With 3-State Outputs 20-PDIP -40 to 85 |
| 中文描述： | NICStAR評估板IDT77211的PCI分段和重組控制器 |
| 文件頁數(shù)： | 3/5頁 |
| 文件大?。?/td> | 76K |
| 代理商： | IDT77911 |
IDT77911
NICStAR Evaluation Board
ADVANCED INFORMATION
Commercial Temperature Range
8.10
3
devide by 2 output clock from the SAR. Optionally, this clock
can be supplied via a separate osallator, U15, PHY clock and
runs typically at 25 MHz. All clock oscillators on the board
have ferrite-bead power supply filters, and both SAR oscillator
sockets have 33 Ohm source series and 330/220 Ohm end
parallel termination resistors provided for optimum signal
integrity.
The NICStAR has a private local SRAM/EPROM data bus,
SR_I/O[31:0] and address bus, SR_A[16:0]. It also supports
a four-wire private EEPROM bus, three of which are outputs
(EE_SCLK, EE_CS#, EE_DO) and one of which is an input
(EE_DI).
NICStAR supports 4 32Kx8 or 128Kx8 asynchronous
SRAMS. SRAM timing is fixed at one cycle. The NICStAR
spec requires 20 ns access time SRAMs when the NICStAR
is running at 50 MHz. When 32Kx8 devices are installed, R64-
R67 should be 0 Ohms. When 128Kx8 devices are installed,
R64-R67 should be 1K Ohms.
NICStAR supports 1 32Kx8 or 128Kx8 EPROM. EPROM
timing is fixed at three cycles. NICStAR requires a 70 ns
access time EPROM.
NICStAR supports 1 EEPROM device. The four EEPROM
signals are completely under software control, so access
times and protocols can be specified by the user. The eval
board uses a Xicor X25020 EEPROM. This device requires
EE_CS# to be asserted low during all operations. Control or
data bits are taken from EE_DO at the rising edge of EE_SCLK,
and EE_DI changes on the falling edge of EE_SCLK. Refer to
the X25020 documentation for more information. The 77911
provides LEDs on EE_DO (D6) and EE_SCLK (D5). These
LEDs illuminate when the corresponding signal is asserted
low, and may be used to signal status to the user when the
EEPROM is not being accessed.
The NICStAR has a multiplexed utility bus, UTL_AD[7:0]
plus five UTL control signals. This bus may be used to
communicate with external 8-bit devices. The 77911 uses the
utility bus in this way to communicate with the registers on the
PHY. This interface is also under software control, so protocol
can be specified by the user.
The last two buses on the NICStAR are the UTOPIA
transmit and receive buses. These follow the ATM Forum’s
specification of the UTOPIA interface. They run at the PHY_CLK
speed, with the NICStAR generating the TXCLK and RXCLK
signals to the PHY device.
The PHY device used is the IDT77155 SWITCHStAR. It
has the standard transmit and receive UTOPIA or SDH
interfaces, and a non-multiplexed utility bus for register ac-
cess. The PHY utility data bus and address bus are connected
together on the eval board; the NICStAR ALE signal defines
the mode of this combined bus in a way compatible with the
IDT77211 NICStAR and the IDT77155 SWITCHStAR.
The IDT77155 reset input is driven by the NICStAR’s
PHY_RST# input, and R61 is provided to allow this reset
signal to be driven by external logic. Normally a 0 Ohm resistor
is used in this location, but it could be removed or simply
replaced by a 33 Ohm resistor to allow the PHY’s reset input
to be driven without a direct conflict with the NICStAR’s
PHY_RST# output. IDT's 77155 also provides an INT# output
which is connected to the NICStAR’s PHY_INT# input.
The 77155 transmit and receive clock reference frequency
is provided by U1, a 19.44 MHz oscillator. This device is
specified at 10 ppm accuracy to meet the ATM Forum require-
ments for 155.52 Mbps operation. As with the other oscillators
on the eval board, this oscillator has a ferrite-bead power
supply filter, and a 33 Ohm source series termination resistor.
End termination is provided as part of a voltage divider
network designed to limit the input swing at the AC-coupled
RRCLK and TXCLK inputs on the 77155.
The 77155 has several control signals which are connected
to pullup and/or pulldown resistors on the eval board. Refer to
the 77155 documentation and the 77911 schematics for more
details. There are also several status outputs which are not
connected. One status output, RALM, goes high when any of
several different error conditions are detected by the PHY. It
is low only when a signal is present on the receive data inputs,
the 77155 is able to recover a valid clock from the signal, and
the data on the signal contains proper SONET or SDH frames.
RALM is connected to an LED (D4) to act as a “l(fā)ink detect”
indicator.
The clock recovery circuitry for the IDT77155 is aided by a
filter circuit. On the 77911, this circuitry consists of C61, C62,
R50, R45, R47, and U11. Special isolated analog ground and
power planes are provided on the 77911 layout to help this
circuitry work better.
The eval board contains a linear regulator, U10, to use the
+12V supply on the PCI bus to drive the isolated +5V analog
power plane. If R35 is installed and U10 is removed, the
regular VCC plane is connected to the analog power plane
instead.
IDT's 77155 has a six-wire connection to the physical
media devices (PMD) which consists of three pairs of PECL-
level differential signals. One pair is transmit data, one pair is
receive data, and the last pair is signal detect, which can also
be connected as a single-ended PECL or CMOS signal. The
77911 provides the PMD connection for the fiber interface. It
also includes extensive termination circuitry with several
possible configurations to provide the best possible signal
integrity between the PHY and the PMD.
77911
The 77911 interface is provided via U9, a 9-pin fiber optical
data link (ODL) footprint which can be loaded with any
standard 9-pin ODL device. The 77911 is loaded with the
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDT77V011L155DA | 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| IDT77V011L155DA8 | 功能描述:INTERFACE DPI-UTOPIA 144-TQFP RoHS:否 類別:集成電路 (IC) >> 接口 - 專用 系列:- 標準包裝:3,000 系列:- 應(yīng)用:PDA，便攜式音頻/視頻，智能電話 接口:I²C，2 線串口 電源電壓:1.65 V ~ 3.6 V 封裝/外殼:24-WQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:24-QFN 裸露焊盤（4x4） 包裝:帶卷 (TR) 安裝類型:表面貼裝 產(chǎn)品目錄頁面:1015 (CN2011-ZH PDF) 其它名稱:296-25223-2 |
| IDT77V106L25TF | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT77V106-L25TFI | 制造商:Integrated Device Technology Inc 功能描述:ATM/SONET TRANSCEIVER, 64 Pin, Plastic, QFP |
| IDT77V252L155PG | 制造商:Integrated Device Technology Inc 功能描述:ATM/SONET SEGMENTATION AND REASSEMBLY CIRCUIT, 208 Pin, Plastic, QFP |
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