9 of 25

The following is a list of the supported external requests:

+

1

1"

"

" &

&

Fundamental operational modes for the processor are initialized by

the boot-time mode control interface. The boot-time mode control inter-

face is a serial interface operating at a very low frequency (MasterClock

divided by 256). The low-frequency operation allows the initialization

information to be kept in a low-cost EPROM; alternatively the twenty-or-

so bits could be generated by the system interface ASIC or a simple

PAL.

To initialize all fundamental, operational modes, immediately after the

signal is asserted, the processor reads a serial bit stream of 256

bits. After initialization is complete, the processor continues to drive the

serial clock output, but no further initialization bits are read.

+

1

1"

"

"

The boot-time serial mode stream is defined in Table 5. Bit 0 is the bit

2

"

CP0 is also used to control the power management for the RC4650.

This is the standby mode and it can be used to reduce the power

consumption of the internal core of the CPU. The standby mode is

entered by executing the WAIT instruction with the SysAD bus idle and

is exited by any interrupt.

!

)

&

&

The RC4650 provides a means to reduce the amount of power

consumed by the internal core when the CPU would otherwise not be

performing any useful operations. This is known as “Standby Mode.”



!

!

)

))

)

Executing the WAIT instruction enables interrupts and enters

Standby mode. When the WAIT instruction finishes the W pipe-stage, if

the SysAd bus is currently idle, the internal clocks will shut down, thus

freezing the pipeline. The PLL, internal timer, and some of the input pins

(Int[5:0]*, NMI*, ExtReq*, Reset*, and ColdReset*) will continue to run. If

the conditions are not correct when the WAIT instruction finishes the W

pipe-stage (i.e. the SysAd bus is not idle), the WAIT is treated as a NOP.

Once the CPU is in Standby Mode, any interrupt, including the inter-

nally generated timer interrupt, will cause the CPU to exit Standby

Mode.