參數(shù)資料
型號： IDT821054PQF
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 19/45頁
文件大小： 0K
描述： IC PCM CODEC QUAD MPI 64-PQFP
標準包裝： 84
類型： PCM 編解碼器/濾波器
數(shù)據(jù)接口： PCM 音頻接口
ADC / DAC 數(shù)量： 4 / 4
三角積分調(diào)變： 無
電壓 - 電源，模擬： 4.75 V ~ 5.25 V
電壓 - 電源，數(shù)字： 4.75 V ~ 5.25 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-QFP
供應(yīng)商設(shè)備封裝： 64-PQFP（14x14）
包裝： 管件
其它名稱： 821054PQF
26
IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
INDUSTRIAL TEMPERATURE RANGE
CS[1:0] = 10:
transmits data on falling edges of BCLK, receives data on falling edges of BCLK.
CS[1:0] = 11:
transmits data on falling edges of BCLK, receives data on rising edges of BCLK.
The PCM data Offset Configuration bits (OC[2:0]) determine that the transmit and receive time slots of PCM data offset from the FS
signal by how many periods of BCLK:
OC[2:0] = 000:
0 period of BCLK (default);
OC[2:0] = 001:
1 period of BCLK;
OC[2:0] = 010:
2 periods of BCLK;
OC[2:0] = 011:
3 periods of BCLK;
OC[2:0] = 100:
4 periods of BCLK;
OC[2:0] = 101:
5 periods of BCLK;
OC[2:0] = 110:
6 periods of BCLK;
OC[2:0] = 111:
7 periods of BCLK.
GREG8: SLIC Ring Trip Setting and Control, Read/Write (27H/A7H)
The Output Polarity Indicator bit (OPI) indicates the valid polarity of output:
OPI = 0:
the selected output pin changes from low to high to activate the ring (default);
OPI = 1:
the selected output pin changes from high to low to activate the ring.
The Input Polarity Indicator bit (IPI) indicates the valid polarity of input:
IPI = 0:
active low (default);
IPI = 1:
active high.
The Input Selection bit (IS) determines which input will be selected as the off-hook indication signal source.
IS = 0:
SI1 is selected (default);
IS = 1:
SI2 is selected.
The Ring Trip Enable bit (RTE) enables or disables the ring trip function block:
RTE = 0:
the ring trip function block is disabled (default);
RTE = 1:
the ring trip function block is enabled.
The Output Selection bits (OS[2:0]) determine which output will be selected as the ring control signal source.
OS[2:0] = 000 - 010:
not defined;
OS[2:0] = 011:
SB1 is selected (when SB1 is configured as an output);
OS[2:0] = 100:
SB2 is selected (when SB2 is configured as an output);
OS[2:0] = 101:
SB3 is selected (when SB3 is configured as an output);
OS[2:0] = 110:
SO1 is selected;
OS[2:0] = 111:
SO2 is selected.
GREG9: SI Data, Read Only (28H)
The SIA[3:0] bits contain the debounced data (off-hook status) on the SI1 pins of Channel 4 to Channel 1 respectively.
The SIB[3:0] bits contain the debounced data (ground key status) on the SI2 pins of Channel 4 to Channel 1 respectively.
b7
b6
b5
b4
b3
b2
b1
b0
Command
R/W
0
1001
11
I/O data
OPI
Reserved
IPI
IS
RTE
OS[2]
OS[1]
OS[0]
b7
b6
b5
b4
b3
b2
b1
b0
Command
00
1010
00
I/O data
SIB[3]
SIB[2]
SIB[1]
SIB[0]
SIA[3]
SIA[2]
SIA[1]
SIA[0]
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參數(shù)描述
IDT821054PQFG 功能描述:IC PCM CODEC QUAD MPI 64-PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態(tài)范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
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