參數(shù)資料
型號： IDT821054PQF
廠商： IDT, Integrated Device Technology Inc
文件頁數(shù)： 24/45頁
文件大?。?/td> 0K
描述： IC PCM CODEC QUAD MPI 64-PQFP
標(biāo)準(zhǔn)包裝： 84
類型： PCM 編解碼器/濾波器
數(shù)據(jù)接口： PCM 音頻接口
ADC / DAC 數(shù)量： 4 / 4
三角積分調(diào)變： 無
電壓 - 電源，模擬： 4.75 V ~ 5.25 V
電壓 - 電源，數(shù)字： 4.75 V ~ 5.25 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-QFP
供應(yīng)商設(shè)備封裝： 64-PQFP（14x14）
包裝： 管件
其它名稱： 821054PQF
30
IDT821054 QUAD PROGRAMMABLE PCM CODEC WITH MPI INTERFACE
INDUSTRIAL TEMPERATURE RANGE
The Linear/Compressed bit (L/C) determines the mode of level meter operation.
L/C = 0:
Message mode is selected. The compressed PCM data will be output to GREG19 transparently (default).
L/C = 1:
Metering mode is selected. The linear PCM data will be metered and the result will be output to the registers
GREG18 and GREG19.
The Level Meter Channel Select bits (CS[1:0]) select a channel, data on which will be level metered.
CS[1:0] = 00:
Channel 1 is selected (default);
CS[1:0] = 01:
Channel 2 is selected;
CS[1:0] = 10:
Channel 3 is selected;
CS[1:0] = 11:
Channel 4 is selected.
GREG22: Global Loopback Control and PLL Power Down, Read/Write (35H/B5H)
The PLL Power Down bit (PPD) controls the operation state of the PLL block.
PPD = 0:
The PLL is disabled. The device is in normal operation state (default);
PPD = 1:
The PLL is powered down. The device works in power-saving mode. All clocks stop running.
The Loop Control bits determine the loopback status. Refer to Figure - 4 on page 11 for detailed information.
DLB_ANA = 0:
The Digital Loopback via Analog Interface is disabled (default);
DLB_ANA = 1:
The Digital Loopback via Analog Interface is enabled.
ALB_8k = 0:
The Analog Loopback via 8 kHz Interface is disabled (default);
ALB_8k = 1:
The Analog Loopback via 8 kHz Interface is enabled.
DLB_8k = 0:
The Digital Loopback via 8 kHz Interface is disabled (default);
DLB_8k = 1:
The Digital Loopback via 8 kHz Interface is enabled.
DLB_DI = 0:
The Digital Loopback from DR to DX is disabled (default);
DLB_DI = 1:
The Digital Loopback from DR to DX is enabled.
ALB_DI = 0:
The Analog Loopback from DX to DR is disabled (default);
ALB_DI = 1:
The Analog Loopback from DX to DR is enabled.
GREG23: Over-sampling Timing Tuning, Read/Write (37H/B7H)
To improve the performance of total distortion, it is recommended to write a data byte of 40H to this register. The default value is 00H.
b7
b6
b5
b4
b3
b2
b1
b0
Command
R/W
0
1101
01
I/O data
Reserved
PPD
DLB_ANA
ALB_8k
DLB_8k
DLB_DI
ALB_DI
b7
b6
b5
b4
b3
b2
b1
b0
Command
R/W
0
1101
11
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參數(shù)描述
IDT821054PQFG 功能描述:IC PCM CODEC QUAD MPI 64-PQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR)
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