參數資料
型號: IDT82V2051EPP
廠商: IDT, Integrated Device Technology Inc
文件頁數: 3/61頁
文件大小: 0K
描述: IC LIU E1 SGL SHORT HAUL 44-TQFP
標準包裝: 80
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 44-LQFP
供應商設備封裝: 44-TQFP(10x10)
包裝: 托盤
其它名稱: 82V2051EPP
IDT82V2051E
SINGLE CHANNEL E1 SHORT HAUL LINE INTERFACE UNIT
Pin Description
11
December 9, 2005
INT
RXTXM0
O
I
20
INT: Interrupt Request
In software control mode, this pin outputs the general interrupt request for all interrupt sources. These interrupt sources can be
masked individually via registers (INTM0, 14H) and (INTM1, 15H). The interrupt status is reported via the registers (INTS0,
19H) and (INTS1, 1AH).
Output characteristics of this pin can be defined to be push-pull (active high or active low) or open-drain (active low) by setting
INT_PIN[1:0] (GCF, 02H).
RXTXM0
See RXTXM1 above.
SCLK
ALE
AS
LP1
I
25
SCLK: Shift Clock
In serial microcontroller interface mode, this signal is the shift clock for the serial interface. Configuration data on SDI pin is sam-
pled on the rising edge of SCLK. Configuration and status data on SDO pin is clocked out of the device on the falling edge of
SCLK if SCLKE pin is high, or on the rising edge of SCLK if SCLKE pin is low.
ALE: Address Latch Enable
In parallel microcontroller interface mode with multiplexed Intel interface, the address on AD[7:0] is sampled into the device on
the falling edge of ALE.
AS: Address Strobe
In parallel microcontroller interface mode with multiplexed Motorola interface, the address on AD[7:0] is latched into the device
on the falling edge of AS.
LP[1:0]: Loopback mode select
When the chip is configured by hardware, this pin is used to select loopback operation modes:
00= no loopback
01= analog loopback
10= digital loopback
11= remote loopback
SDI
WR
R/W
LP0
I
24
SDI: Serial Data Input
In serial microcontroller interface mode, this signal is the input data to the serial interface. Configuration data at SDI pin is sam-
pled by the device on the rising edge of SCLK.
WR: Write Strobe
In Intel parallel multiplexed interface mode, this pin is asserted low by the microcontroller to initiate a write cycle. The data on
AD[7:0] is sampled into the device in a write operation.
R/W: Read/Write Select
In Motorola parallel multiplexed interface mode, this pin is low for write operation and high for read operation.
LP0
See LP1 above.
Table-1 Pin Description (Continued)
Name
Type
Pin No.
Description
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