參數(shù)資料
型號: IDT82V2051EPPG
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 30/61頁
文件大?。?/td> 0K
描述: IC LIU E1 SGL SHORT HAUL 44-TQFP
標(biāo)準(zhǔn)包裝: 80
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 3.13 V ~ 3.47 V
安裝類型: 表面貼裝
封裝/外殼: 44-LQFP
供應(yīng)商設(shè)備封裝: 44-TQFP(10x10)
包裝: 托盤
其它名稱: 82V2051EPPG
IDT82V2051E
SINGLE CHANNEL E1 SHORT HAUL LINE INTERFACE UNIT
Programming Information
36
December 9, 2005
Table-22 TCF3: Transmitter Configuration Register 3
(R/W, Address = 08H)
Symbol
Bit
Default
Description
DONE
7
0
After ‘1’ is written to this bit, a read or write operation is implemented.
RW
6
0
This bit selects read or write operation
= 0: Write to RAM
= 1: Read from RAM
UI[1:0]
5-4
00
These bits specify the unit interval address. There are totally 4 unit intervals.
= 00: UI address is 0 (The most left UI)
= 01: UI address is 1
= 10: UI address is 2
= 11: UI address is 3
SAMP[3:0]
3-0
0000
These bits specify the sample address. Each UI has totally 16 samples.
= 0000: Sample address is 0 (The most left sample)
= 0001: Sample address is 1
= 0010: Sample address is 2
……
= 1110: Sample address is 14
= 1111: Sample address is 15
Table-23 TCF4: Transmitter Configuration Register 4
(R/W, Address = 09H)
Symbol
Bit
Default
Description
-7
0
Reserved
WDAT[6:0]
6-0
0000000
In Indirect Write operation, the WDAT[6:0] will be loaded to the pulse template RAM, specifying the amplitude of
the Sample.
After an Indirect Read operation, the amplitude data of the Sample in the pulse template RAM will be output to the
WDAT[6:0].
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