參數(shù)資料
型號: IDT82V3002APV
廠商: INTEGRATED DEVICE TECHNOLOGY INC
元件分類: 通信及網(wǎng)絡
英文描述: WAN PLL WITH DUAL REFERENCE INPUTS
中文描述: SPECIALTY TELECOM CIRCUIT, PDSO56
封裝: SSOP-56
文件頁數(shù): 3/28頁
文件大?。?/td> 390K
代理商: IDT82V3002APV
3
IDT82V3002A WAN PLL WITH DUAL REFERENCE INPUTS INDUSTRIAL TEMPERATURE RANGE
TABLE OF CONTENTS
1
IDT82V3002A PIN CONFIGURATION...........................................................................................................................6
2
PIN DESCRIPTION........................................................................................................................................................7
3
FUNCTIONAL DESCRIPTION.....................................................................................................................................10
3.1 State Control Circuit.............................................................................................................................................10
3.1.1 Normal Mode............................................................................................................................................11
3.1.2 Fast Lock Mode........................................................................................................................................11
3.1.3 Holdover Mode .........................................................................................................................................11
3.1.4 Freerun Mode...........................................................................................................................................12
3.2 Frequency Select Circuit......................................................................................................................................12
3.3 Reference Input Switch........................................................................................................................................12
3.4 Reference Input Monitor......................................................................................................................................12
3.5 Invalid Input Signal Detection..............................................................................................................................12
3.6 TIE Control Block.................................................................................................................................................12
3.7 DPLL Block..........................................................................................................................................................14
3.7.1 Phase Detector (PHD)..............................................................................................................................15
3.7.2 Limiter.......................................................................................................................................................15
3.7.3 Loop Filter.................................................................................................................................................15
3.7.4 Fraction Block...........................................................................................................................................15
3.7.5 Digital Control Oscillator (DCO)................................................................................................................15
3.7.6 Lock Indicator ...........................................................................................................................................16
3.7.7 Output Interface........................................................................................................................................16
3.8 OSC.....................................................................................................................................................................16
3.8.1 Clock Oscillator.........................................................................................................................................16
3.9 JTAG....................................................................................................................................................................16
3.10 Reset Circuit........................................................................................................................................................16
4
MEASURES OF PERFORMANCE..............................................................................................................................17
4.1 Intrinsic Jitter........................................................................................................................................................17
4.2 Jitter Tolerance....................................................................................................................................................17
4.3 Jitter Transfer.......................................................................................................................................................17
4.4 Frequency Accuracy............................................................................................................................................17
4.5 Holdover Accuracy...............................................................................................................................................17
4.6 Capture Range ....................................................................................................................................................17
4.7 Lock Range..........................................................................................................................................................17
4.8 Phase Slope ........................................................................................................................................................17
4.9 Time Interval Error (TIE)......................................................................................................................................17
4.10 Maximum Time Interval Error (MTIE) ..................................................................................................................17
4.11 Phase Continuity..................................................................................................................................................18
4.12 Phase Lock Time.................................................................................................................................................18
5
TEST SPECIFICATIONS .............................................................................................................................................19
5.1 AC Electrical Characteristics ...............................................................................................................................20
6
TIMING CHARACTERISTICS......................................................................................................................................24
7
ORDERING INFORMATION........................................................................................................................................28
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