參數(shù)資料
型號(hào): IDTCSPT857DPAGI8
廠商: IDT, Integrated Device Technology Inc
文件頁(yè)數(shù): 6/15頁(yè)
文件大小: 0K
描述: IC PLL CLK DVR SDRAM 48-TSSOP
標(biāo)準(zhǔn)包裝: 2,000
類型: 時(shí)鐘緩沖器/驅(qū)動(dòng)器,零延遲緩沖器,多路復(fù)用器
PLL:
主要目的: 存儲(chǔ)器,DDR,SDRAM
輸入: 時(shí)鐘
輸出: 時(shí)鐘
電路數(shù): 1
比率 - 輸入:輸出: 1:10
差分 - 輸入:輸出: 是/是
頻率 - 最大: 220MHz
電源電壓: 2.3 V ~ 2.7 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-TFSOP(0.240",6.10mm 寬)
供應(yīng)商設(shè)備封裝: 48-TSSOP
包裝: 帶卷 (TR)
其它名稱: CSPT857DPAGI8
14
COMMERCIALTEMPERATURERANGE
IDTCSPT857D
2.5V - 2.6V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER
APPLICATION INFORMATION
CSPT857D
C = 14pF
R = 120
Ω
FBIN
C = 14pF
R = 120
Ω
CLK
Feedback path
R = 120
Ω
Z = 60
Ω
Z = 60
Ω
8 more
SDRAM
~2.5"
~0.3"
~0.6" (split to terminator)
(1)
CSPT857D
C = 14pF
R = 120
Ω
FBIN
C = 14pF
R = 120
Ω
CLK
Feedback path
R = 120
Ω
Z = 60
Ω
Z = 60
Ω
8 more
SDRAM
~2.5"
~0.3"
~0.6" (split to terminator)
SDRAM
Stacked
(1)
Figure 9. Clock Structure 1
Figure 10. Clock Structure 2
NOTE:
1.
Memory module vendors may need to adjust the feedback capacitive load in order to meet DDR SDRAM registered DIMM timing requirements.
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