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參數(shù)資料
| 型號(hào)： | IDTCV110JP |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
| 中文描述： | 可編程FLEXPC時(shí)鐘P4處理器 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 76K |
| 代理商： | IDTCV110JP |
COMMERCIAL TEMPERATURE RANGE
4
IDTCV110J
PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR
PIN DES CRIPT ION (CONT.)
Pin Number
43
CPU0#
44
45
V
SS
_CPU
46
47
48
V
DD
_REF
49
XTAL_OUT
50
XTAL_IN
51
V
SS
_REF
52
53
FSC/TEST_SEL
54
55
56
Name
Type
OUT
OUT
GND
IN
I/O
PWR
OUT
IN
GND
OUT
IN
OUT
OUT
OUT
Description
Host 0.7 current mode differential clock output
Host 0.7 current mode differential clock output
GND
SMBus clock
SMBus data
3.3V
XTAL output
XTAL input
GND
14.318 MHz reference clock output
CPU frequency selection. Selects test mode if pulled to above 2V when V
TT
_P
WRGD
#is asserted LOW.
PCI clock
PCI clock
PCI clock
CPU0
SCL
SDA
REF
PCI0
PCI1
PCI2
INDEX BLOCK WRITE PROTOCOL
Bit
#of bits
From
1
1
Master
2-9
8
Master
10
1
Slave
11-18
8
Master
19
1
Slave
20-27
8
Master
28
1
Slave
29-36
8
Master
37
1
Slave
38-45
8
Master
46
1
Slave
Description
Start
D2h
Ack (Acknowledge)
Register offset byte (starting byte)
Ack (Acknowledge)
Byte count, N (0 is not valid)
Ack (Acknowledge)
first data byte (Offset data byte)
Ack (Acknowledge)
2nd data byte
Ack (Acknowledge)
:
Nth data byte
Acknowledge
Stop
Master
Slave
Master
INDEX BLOCK READ PROTOCOL
Master can stop reading any time by issuing the stop bit without waiting
until Nth byte (byte count bit30-37).
Bit
1
2-9
10
11-18
19
20
21-28
29
30-37
#of bits
1
8
1
8
1
1
8
1
8
From
Master
Master
Slave
Master
Slave
Master
Master
Slave
Slave
Description
Start
D2h
Ack (Acknowledge)
Register offset byte (starting byte)
Ack (Acknowledge)
Repeated Start
D3h
Ack (Acknowledge)
Byte count, N (block read back of N
bytes), power on is 8
Ack (Acknowledge)
first data byte (Offset data byte)
Ack (Acknowledge)
2nd data byte
Ack (Acknowledge)
:
Ack (Acknowledge)
Nth data byte
Not acknowledge
Stop
38
1
8
1
8
Master
Slave
Master
Slave
39-46
47
48-55
Master
Slave
Master
INDEX BY TE WRITE
Setting bit[11:18] = starting address, bit[20:27] = 01h.
INDEX BY TE READ
Setting bit[11:18] = starting address. After reading back the first data byte,
master issues Stop bit.
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| IDTCV110JPV | PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IDTCV110JPV | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
| IDTCV110JPVG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
| IDTCV110L | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
| IDTCV110LPV | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
| IDTCV110LPVG | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:PROGRAMMABLE FLEXPC CLOCK FOR P4 PROCESSOR |
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