參數(shù)資料
型號: IDTIDT71P71804200BQ
廠商: Integrated Device Technology, Inc.
英文描述: 18Mb Pipelined DDR⑩II SRAM Burst of 2
中文描述: 35.7流水線的DDR II SRAM的突發(fā)⑩2
文件頁數(shù): 4/23頁
文件大?。?/td> 241K
代理商: IDTIDT71P71804200BQ
6.42
IDT71P71804 (1M x 18-Bit) 71P71604 (512K x 36-Bit)
18 Mb DDR II SRAM Burst of 2 Commercial Temperature Range
Pin Definitions continued
Symbol
Pin Function
Description
Doff
Input
DLL Turn Off. When low this input will turn off the DLL inside the device. The AC timngs with the DLL turned off will
be different fromthose listed in this data sheet. There will be an increased propagation delay fromthe incidence of
C and
C
to DQ, or K and
K
to DQ as configured. The propagation delay is not a tested parameter but will be
simlar to the propagation delay of other SRAMdevices in this speed grade.
TDO
Output
TDO pin for JTAG
TCK
Input
TCK pin for JTAG.
TDI
Input
TDI pin for JTAG. An internal resistor will pull TDI to V
DD
when the pin is unconnected.
TMS
Input
TMS pin for JTAG. An internal resistor wll pull TMS to V
DD
when the pin is unconnected.
NC
No Connect
No connects inside the package. Can be tied to any voltage level.
V
REF
Input Reference
Reference Voltage input. Static input used to set the reference level for HSTL inputs and outputs as well as AC
measurement points.
V
DD
Power Supply
Power supply inputs to the core of the device. Should be connected to a 1.8V power supply.
V
SS
Ground
Ground for the device. Should be connected to ground of the system.
V
DDQ
Power Supply
Power supply for the outputs of the device. Should be connected to a 1.5V power supply for HSTL or scaled to
the desired output voltage.
6112 tbl 02b
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IDTIDT71P71804250BQ 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:18Mb Pipelined DDR⑩II SRAM Burst of 2
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IDTIDT71P79104200BQ 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:18Mb Pipelined DDR⑩II SIO SRAM Burst of 2
IDTIDT71P79104200BQI 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:18Mb Pipelined DDR⑩II SIO SRAM Burst of 2