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參數(shù)資料
| 型號： | IDTQS3ST253Q8 |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 編、解碼器及復用、解復用 |
| 英文描述： | DUAL 4 LINE TO 1 LINE MULTIPLEXER AND DEMUX/DECODER, TRUE OUTPUT, PDSO20 |
| 封裝： | QSOP-20 |
| 文件頁數(shù)： | 5/10頁 |
| 文件大?。?/td> | 74K |
| 代理商： | IDTQS3ST253Q8 |
4
INDUSTRIALTEMPERATURERANGE
IDTQS3ST253
HIGH-SPEED CMOS SYNCHROSWITCH DUAL 4:1 MUX/DEMUX
RON
(ohms)
VIN
(Volts)
TYPICAL ON RESISTANCE vs VIN AT VCC = 5V
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
2
4
6
8
10
12
14
16
Symbol
Parameter
Test Conditions
Min.
Typ.(1)
Max.
Unit
VIH
Input HIGH Level
Guaranteed Logic HIGH for Control Pins
2
—
V
VIL
Input LOW Level
Guaranteed Logic LOW for Control Pins
—
0.8
V
IIN
Input Leakage Current (Control Inputs)
0V
≤ VIN ≤ VCC
—
0.01
±1A
IOZ
Off-State Current (Hi-Z)
0V
≤ Y ≤ VCC
—
—0.01
±1A
RON
Switch ON Resistance(2)
VCC = Min., VIN = 0V, ION = 30mA
—
7
9
VCC = Min., VIN = 2.4V, ION =15mA
—
10
13
IBHL
Input Hold Current (3,4)
Vcc = Min.
VIN = 0.8V
60
—
A
IBHH
(A, B, C, D)
Switch OFF
VIN = 2V
– 60
—
IBH
InputCurrent(5)
Vcc = Max.
VIN = 0V or Vcc
—
±50
A
(A, B, C, D)
0.8 < VIN < 2V
—
±500
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
FollowingConditionsApplyUnlessOtherwiseSpecified:
Industrial: TA = –40°C to +85°C, VCC = 5.0V ±10%
NOTES:
1. Typical values are at VCC = 5.0V, TA = 25°C.
2. Measured by voltage drop between A/B/C/D and Y pin at indicated current through the switch.
3. IBHL is the minimum sustaining “sink” current at the input for VIN = 0.8V. This parameter signifies the latching capability of the bus-hold circuit in logic LOW state.
4. IBHH is the minimum sustaining “source” current at the input for VIN = 2V. This parameter signifies the latching capability of the bus-hold circuit in logic HIGH state.
5. IBH is the magnitude of the input current specified under two conditions:
a) Input voltage at GND or Vcc. This indicates the input current under steady-state condition.
b) Input voltage between 0.8V and 2V (TTL input threshold range). This indicates the maximum input current during transient condition. The driver connected to the input
must overcome this current requirement in order to switch the logic state of the bus-hold circuit.
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