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參數(shù)資料
| 型號： | IDTQS4A205QG8 |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 3/7頁 |
| 文件大小： | 0K |
| 描述： | IC MUX/DEMUX QUAD SPDT 16QSOP |
| 標準包裝： | 3,000 |
| 功能： | 多路復用器/多路分解器 |
| 電路： | 4 x SPDT |
| 導通狀態(tài)電阻： | 17 歐姆 |
| 電壓電源： | 單電源 |
| 電壓 - 電源，單路/雙路(±)： | 5V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SSOP（0.154"，3.90mm 寬） |
| 供應商設(shè)備封裝： | 16-QSOP |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | QS4A205QG8 |
3
IDTQS4A205
HIGH-PERFORMANCECMOSANALOGFOUR-CHANNELSPDTMUX/DEMUX
INDUSTRIALTEMPERATURERANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 5V ± 5%
Symbol
Parameter
Test Conditions
Min.
Typ.(1) Max.
Unit
Analog Switch
VIN
Analog Signal Range(2)
–0.5
1
Vcc - 1
V
rDS(ON)
Drain-source ON resistance(2,3)
Vcc = Min., VIN = 0V
, ION = 30mA
—
5
7
Ω
Vcc = Min., VIN = 2.4V
, ION = 15mA
—
13
17
IC(OFF)
Channel Off Leakage Current
IN = Vcc or 0V; YN = 0V or Vcc;
E = Vcc
—
2
—
nA
IC(ON)
Channel On Leakage Current
IN = YN = 0V
—
2
—
nA
(each channel is turned on sequentially)
Digital Control
VIH
Input HIGH Voltage
Guaranteed Logic HIGH for Control Pins
2
—
V
VIL
Input LOW Voltage
Guaranteed Logic LOW for Control Pins
—
0.8
V
Dynamic Characteristics
tTRANS
Switching Time of MUX S to Y
RL = 1K
Ω, CL = 100pF
0.5
—
6.6
ns
tON(EN)
Enable Turn-On Time,
E to Y
RL = 1K
Ω, CL = 100pF
0.5
—
6
ns
tOFF(EN)
Enable Turn-Off Time,
E to Y
RL = 1K
Ω, CL = 100pF
0.5
—
6
ns
tPD
Group Delay(2,4)
RL = 1K
Ω, CL = 100pF
—
250
ps
f3dB
-3dB Bandwidth
VIN = 1Vp-p, RL = 75
Ω
—
830
—
MHz
Off-isolation
VIN = 1Vp-p, RL = 75
Ω, f = 5MHz
—
-60
—
dB
XTALK
Crosstalk
VIN = 1Vp-p, RL = 75
Ω, f = 5MHz
—
-100
—
dB
QCI
Charge Injection
—
1.5
—
pC
NOTES:
1. Typical values are at VCC = 5.0V, TA = 25°C.
2. Max value is guaranteed but not production tested.
3. Measured by voltage drop between A and C pins or B and D pins at indicated current through the switch. ON resistance is determined by the lower of the voltages on the
two (A, C, or B, D) pins.
4. The bus switch contributes no group delay other than the RC delay of the ON resistance of the switch and load capacitance. Group delay of the bus switch, when used
in a system, is determined by the driving circuit on the driving side of the switch and its interaction with the load on the driven side.
POWER SUPPLY CHARACTERISTICS
Symbol
Parameter
Test Conditions
Max.
Unit
ICCQ
Quiescent Power
VCC = Max., VIN = GND or VCC, f = 0
3
A
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