84
8048C–AVR–02/12
ATtiny43U
equals the OCRnx value, the Compare Match will be missed, resulting in incorrect waveform
generation. Similarly, do not write the TCNTn value equal to BOTTOM when the counter is
down-counting.
The setup of the OCnx should be performed before setting the Data Direction Register for the
port pin to output. The easiest way of setting the OCnx value is to use the Force Output Com-
pare (nx) strobe bits in Normal mode. The OCnx Registers keep their values even when
changing between Waveform Generation modes.
Be aware that the COMnx[1:0] bits are not double buffered together with the compare value.
Changing the COMnx[1:0] bits will take effect immediately.
12.6
Compare Match Output Unit
The Compare Output mode (COMnx[1:0]) bits have two functions. The Waveform Generator
uses the COMnx[1:0] bits for defining the Output Compare (OCnx) state at the next Compare
shows a simplified schematic of the logic affected by the COMnx[1:0] bit setting. The I/O Regis-
ters, I/O bits, and I/O pins in the figure are shown in bold. Only the parts of the general I/O Port
Control Registers (DDR and PORT) that are affected by the COMnx[1:0] bits are shown. When
referring to the OCnx state, the reference is for the internal OCnx Register, not the OCnx pin. If
a system reset occur, the OCnx Register is reset to “0”.
Figure 12-4. Compare Match Output Unit, Schematic (non-PWM Mode)
The general I/O port function is overridden by the Output Compare (OCnx) from the Waveform
Generator if either of the COMnx[1:0] bits are set. However, the OCnx pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
PORT
DDR
DQ
OCn
Pin
OCnx
DQ
Waveform
Generator
COMnx1
COMnx0
0
1
D
ATA
B
U
S
FOCn
clk
I/O