參數(shù)資料
型號(hào)： IMST425-J20S
元件分類(lèi)： 32位微控制器
英文描述： 32-Bit Microprocessor
中文描述： 32位微處理器
文件頁(yè)數(shù)： 31/74頁(yè)
文件大?。?/td> 563K
代理商： IMST425-J20S
5 External memory interface
/ 74
31
5.7
Memory configuration
MemConfig
is an input pin used to readconfiguration data when setting external memoryinterface (EMI)
characteristics. It is read by the processor on two occasions after
Reset
goes low; first to check if one of
the preset internal configurations is required, then to determine a possible external configuration.
5.7.1
Internal configuration
The internal configuration scancomprises 64periods
TDCLDCL
of
ClockIn
during theinternal scan peri-
od of 144
ClockIn
periods.
MemnotWrD0
,
MemnotRfD1
and
MemAD2-32
are all high at the beginning
of the scan. Starting with
MemnotWrD0
, each of these lines goes low successively at intervals of two
ClockIn
periods and stays low until the end of thescan. If one of these lines is connected to
MemConfig
the presetinternal configurationmode associatedwith that linewillbe usedas theEMI configuration.The
default configuration is that defined in the table for
MemAD31
; connecting
MemConfig
to
VDD
will also
produce this default configuration. Note that only 17 of the possibleconfigurations are valid,all others re-
main at the default configuration.
Duration of each Tstate
periods Tm
T1
T2
T3
Strobe
coefficient
s2
Write
cycle
type
Refresh
interval
ClockIn
cycles
72
72
72
72
72
72
72
72
Cycle
time
Proc
cycles
3
4
5
6
3
4
5
6
3
4
7
9
4
5
6
7
12
Pin
T4
T5
T6
s1
s3
s4
MemnotWrD0
MemnotRfD1
MemAD2
MemAD3
MemAD4
MemAD5
MemAD6
MemAD7
MemAD8
MemAD9
MemAD10
MemAD11
MemAD12
MemAD13
MemAD14
MemAD15
MemAD31
1
1
1
2
1
1
2
2
1
1
2
3
1
2
2
2
4
1
2
2
3
1
1
1
2
1
1
2
3
1
1
2
1
4
1
1
1
1
1
2
2
2
1
2
2
3
2
2
2
2
4
1
1
1
1
1
1
1
1
1
1
2
3
1
1
1
3
4
1
1
2
2
1
2
3
3
1
2
4
3
2
2
3
3
4
1
2
3
3
1
1
1
2
1
1
2
3
1
2
2
3
4
30
30
30
30
3
5
6
7
30
30
30
30
4
5
6
8
31
1
1
1
1
1
1
1
1
1
2
2
2
1
1
1
1
3
2
2
3
2
2
2
3
2
5
3
4
2
2
3
2
30
5
7
7
8
3
3
3
4
3
9
8
13
3
3
4
3
18
late
late
late
late
early
early
early
early
early
early
late
late
early
early
early
early
late
72
72
72
72
72
72
72
30
Provided for static RAM only.
Table 5.9
IMS T400 internal configuration coding
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