參數(shù)資料
型號(hào): INTEL386 CXSB
廠商: Intel Corp.
英文描述: Low-Voltage, 32-Bit, Fully Static Embedded Microprocessor(低電壓32位完全靜態(tài)嵌入式微處理器)
中文描述: 低電壓,32位,全靜態(tài)嵌入式微處理器(低電壓32位完全靜態(tài)嵌入式微處理器)
文件頁(yè)數(shù): 6/19頁(yè)
文件大?。?/td> 242K
代理商: INTEL386 CXSB
Intel386 CXSB EMBEDDED MICROPROCESSOR
6
ERROR#
I
36
Error
indicates that the math coprocessor has an error condi-
tion.
Float
forces all bidirectional and output signals, including
HLDA, to a high-impedance state.
Bus Hold Acknowledge
indicates that the CPU has surren-
dered control of its local bus to another bus master.
Bus Hold Request
allows another bus master to request con-
trol of the local bus.
Interrupt Request
is a maskable input that causes the CPU
to suspend execution of the current program and then exe-
cute an interrupt acknowledge cycle.
Bus Lock
prevents other system bus masters from gaining
control of the system bus while it is active (low).
Memory/IO
indicates whether the current bus cycle is a mem-
ory cycle or an input/output cycle. When M/IO# is high, the
bus cycle is a memory cycle; when M/IO# is low, the bus cycle
is an I/O cycle.
Next Address
requests address pipelining.
No Connection
should always be left unconnected. Connect-
ing a NC pin may cause the processor to malfunction or cause
your application to be
incompatible with future steppings of
the device.
Nonmaskable Interrupt Request
is a nonmaskable input
that causes the CPU to suspend execution of the current pro-
gram and execute an interrupt acknowledge function.
Processor Extension Request
indicates that the math
coprocessor has data to transfer to the processor.
Bus Ready
indicates that the current bus cycle is finished and
the external device is ready to accept more data from the pro-
cessor.
Reset
suspends any operation in progress and places the
processor into a known reset state.
FLT#
I
28
HLDA
O
3
HOLD
I
4
INTR
I
40
LOCK#
O
26
M/IO#
O
23
NA#
NC
I
6
20, 27, 29–31
NMI
I
38
PEREQ
I
37
READY#
I
7
RESET
I
33
Table 2. Pin Descriptions
(Continued)
Symbol
Type
Pin
Name and Function
NOTES:
1. This pin supports the additional features of the Intel386 CXSB microprocessor; it is not present on the Intel386 SX microprocessor.
2. The A25:24 pins support the additional features of the Intel386 CXSB microprocessor; they are not present on the Intel386 SX micropro-
cessor.
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