參數(shù)資料
型號(hào)： IR21541
文件頁(yè)數(shù)： 2/6頁(yè)
文件大?。?/td> 94K
代理商： IR21541
IR2151
2
Symbol Definition
V
B
V
S
V
HO
V
LO
V
RT
V
CT
I
CC
I
RT
dV
s
/dt
P
D
Min.
-0.3
Max.
625
Units
High side floating supply voltage
High side floating supply offset voltage
V
B
- 25
V
S
- 0.3
-0.3
V
B
+ 0.3
V
B
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
25
High side floating output voltage
Low side output voltage
R
T
voltage
C
T
voltage
Supply current (note 1)
-0.3
-0.3
—
R
T
output current
Allowable offset supply voltage transient
Package power dissipation @ T
A
≤
+25°C
-5
5
—
50
V/ns
(8 lead DIP)
—
1.0
(8 lead SOIC)
—
0.625
R
θ
JA
Thermal resistance, junction to ambient
(8 lead DIP)
—
125
(8 lead SOIC)
—
—
200
150
T
J
T
S
T
L
Junction temperature
Storage temperature
-55
150
°C
Lead temperature (soldering, 10 seconds)
—
300
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
V
°C/W
W
mA
structure between the chip V
CC
and COM which has a nominal breakdown voltage of 15.6V. Therefore, the IC
supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value
resistor connected between the chip V
CC
and the rectified line voltage and a local decoupling capacitor from
V
CC
to COM) and allowing the internal zener clamp circuit to determine the nominal supply voltage. There-
fore, this circuit should not be driven by a DC, low impedance power source of greater than V
CLAMP
.
Note 1:
Because of the IR2151’s application specificity toward off-line supply systems, this IC contains a zener clamp
Symbol
V
B
V
S
V
HO
V
LO
I
CC
T
A
Definition
Min.
V
S
+ 10
—
Max.
V
S
+ 20
600
Units
High side sloating supply absolute voltage
High side floating supply offset voltage
High side floating output voltage
V
S
0
V
B
V
CC
5
Low side output voltage
Supply current (note 1)
—
mA
Ambient temperature
-40
125
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supplies biased at 15V differential.
V
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