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    • 參數資料
      型號: IR3082
      廠商: International Rectifier
      英文描述: XPHASE AMD OPTERON/ATHLON 64 CONTROL IC
      中文描述: XPHASE AMD皓龍/速龍64控制IC
      文件頁數: 19/33頁
      文件大?。?/td> 444K
      代理商: IR3082
      IR3082
      Page 19 of 19
      12/17/04
      DESIGN PROCEDURES – IR3082 AND IR3086 CHIPSET
      IR3082 EXTERNAL COMPONENTS
      Oscillator Resistor
      Rosc
      The oscillator of IR3082 generates a triangle waveform to synchronize the phase ICs, and the switching frequency
      of the each phase converter equals the oscillator frequency, which is set by the external resistor R
      OSC
      according to
      the curve in Figure 13.
      Soft Start Capacitor
      C
      SS/DEL
      and Resistor
      R
      SS/DEL
      Because the capacitor C
      SS/DEL
      programs three different time parameters, i.e. soft start time, over current latch
      delay time, and the frequency of hiccup mode, they should be considered together while choosing C
      SS/DEL
      .
      The SS/DEL pin voltage controls the slew rate of the converter output voltage, as shown in Figure 10. After the
      ENABLE pin voltage rises above 1.23V, there is a soft-start delay time t
      SSDEL
      , after which the error amplifier output
      is released to allow the soft start. The soft start time t
      SS
      represents the time during which the output voltage rises
      from zero to Vo. t
      SS
      can be programmed by an external capacitor, which is determined by Equation (1).
      t
      t
      I
      C
      =
      =
      O
      V
      Once C
      SS/DEL
      is chosen, the soft start delay time t
      SSDEL
      , the over-current fault latch delay time
      t
      OCDEL,
      and the
      delay time t
      VccPG
      from output voltage (Vo) in regulation to Power Good are fixed and shown in Equations (2), (3),
      (4) and (5) respectively.
      3
      3
      CHG
      I
      09
      .
      09
      .
      DISCHG
      I
      .
      )
      73
      .
      =
      =
      CHG
      I
      The hiccup mode duty cycle of over current protection is determined by the charge current I
      CHG
      and discharge
      current I
      DISCHG
      of C
      SS/DEL
      and is fixed at 9%. However, the hiccup frequency is determined by the load current and
      over-current set value.
      If faster over-current protection is required, a resistor in series with the soft start capacitor C
      SS/DEL
      can be used to
      reduce the over-current fault latch delay time
      t
      OCDEL
      , and the resistor R
      SS/DEL
      is determined by Equation (5).
      Equation (1) for soft start capacitor C
      SS/DEL
      and Equation (4) for power good delay time t
      VccPG
      are unchanged,
      while the equation for soft start delay time C
      SS/DEL
      (Equation 2) is changed to Equation (6).
      =
      DISCHG
      I
      O
      SS
      SS
      CHG
      DEL
      SS
      V
      6
      /
      10
      66
      (1)
      6
      /
      /
      10
      66
      =
      =
      DEL
      SS
      DEL
      SS
      SSDEL
      C
      C
      t
      (2)
      6
      /
      /
      10
      6
      =
      =
      DEL
      SS
      DEL
      SS
      OCDEL
      C
      C
      t
      (3)
      6
      /
      /
      10
      66
      )
      73
      O
      DEL
      SS
      O
      DEL
      SS
      VccPG
      V
      C
      V
      C
      t
      (4)
      6
      /
      6
      /
      10
      6
      10
      6
      09
      .
      09
      .
      =
      DEL
      SS
      OCDEL
      DEL
      SS
      DISCHG
      OCDEL
      SSDEL
      C
      t
      C
      I
      t
      R
      (5)
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