參數(shù)資料
型號(hào): IR3637SPBF
廠商: International Rectifier
英文描述: 1% ACCURATE SYNCHRONOUS PWM CONTROLLER
中文描述: 1%準(zhǔn)確的同步PWM控制器
文件頁數(shù): 8/21頁
文件大?。?/td> 655K
代理商: IR3637SPBF
8
Rev.1.1
06/16/05
IR3637SPBF
www.irf.com
For this design, IRF8910 is a good choice. The device
provides two N-MOSFETs in a compact SOIC 8-Pin pack-
age.
The IRF8910 has the following data:
V
DSS
= 20V
I
D
= 10A
R
DS(onh)
=18.3
@ V
GS
=4.5V (Lower FET)
R
DS(on)
=13.4
@ V
GS
=10V (Upper FET)
The total conduction losses will be:
The switching loss is more difficult to calculate, even
though the switching transition is well understood. The
reason is the effect of the parasitic components and
switching times during the switching procedures such
as turn-on / turnoff delays and rise and fall times. The
control MOSFET contributes to the majority of the switch-
ing losses in synchronous Buck converter. The synchro-
nous MOSFET turns on under zero voltage conditions,
therefore, the turn on losses for synchronous MOSFET
can be neglected. With a linear approximation, the total
switching loss can be expressed as:
t
r
+
t
f
T
2
The switching time waveform is shown in figure 7.
V
DS
90%
Figure 7 - Switching time waveforms.
From IRF8910 data sheet:
These values are taken under a certain condition test.
For more detail please refer to the IRF8910 data sheet.
By using equation (6), we can calculate the switching
losses.
P
SW
= 95mW
Feedback Compensation
The IR3637 is a voltage mode controller; the control loop
is a single voltage feedback path including error ampli-
fier and error comparator. To achieve fast transient re-
sponse and accurate output regulation, a compensation
circuit is necessary. The goal of the compensation net-
work is to provide a closed loop transfer function with the
highest 0dB crossing frequency and adequate phase
margin (greater than 45 ).
The output LC filter introduces a double pole, –40dB/
decade gain slope above its corner resonant frequency,
and a total phase lag of 180 (see Figure 8). The Reso-
nant frequency of the LC filter expressed as follows:
Figure 8 shows gain and phase of the LC filter. Since we
already have 180 phase shift just from the output filter,
the system risks being unstable.
Figure 8 - Gain and phase of LC filter.
The IIR3637’s error amplifier is a differential-input transcon-
ductance amplifier. The output is available for DC gain
control or AC phase compensation.
The E/A can be compensated with or without the use of
local feedback. When operated without local feedback
the transconductance properties of the E/A become evi-
dent and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC circuit
from Comp pin to ground as shown in Figure 9.
Where:
V
DS(OFF)
= Drain to Source Voltage at off time
t
r
= Rise Time
t
f
= Fall Time
T = Switching Period
I
LOAD
= Load Current
t
r
= 10ns
t
f
= 4.1ns
P
CON(TOTAL)
=P
CON
(Upper Switch)+P
CON
(Lower Switch)
= 1.4 according to the IRF8910 data sheet for
150 C junction temperature
P
CON(TOTAL)
=0.83W
F
LC
= 1
2
π×
L
O
×
C
O
P
SW
= V
I
LOAD
---(6)
×
DS(OFF)
×
V
GS
10%
t
d
(ON)
t
d
(OFF)
t
r
t
f
Gain
F
LC
0dB
Phase
0
F
LC
-180
Frequency
Frequency
-40dB/decade
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