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2
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Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by T
Jmax
, starting T
J
= 25°C, L = 4.8mH
R
G
= 25
, I
AS
= 3.0A, V
GS
=10V.
Part not recommended for use above this value.
Pulse width
≤
1.0ms; duty cycle
≤
2%.
C
oss
eff. is a fixed capacitance that gives the same
charging time as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
Limited by T
Jmax
, see Fig.12a, 12b, 15, 16 for typical
repetitive avalanche performance.
This value determined from sample failure population.
100% tested to this value in production.
When mounted on 1 inch square copper board.
When mounted on FR-4 board using minimum
recommended footprint.
S
D
G
Electrical Characteristics @ T
J
= 25°C (unless otherwise specified)
Parameter
V
(BR)DSS
Drain-to-Source Breakdown Voltage
V
(BR)DSS
/
T
J
Breakdown Voltage Temp. Coefficient
Min.
55
–––
–––
–––
–––
1.0
7.5
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ. Max. Units
–––
–––
0.049
–––
48
60
–––
80
–––
100
–––
3.0
–––
–––
–––
20
–––
250
–––
200
–––
-200
7.0
11
1.5
–––
4.0
–––
8.6
–––
33
–––
20
–––
15
–––
380
–––
66
–––
36
–––
220
–––
53
–––
93
–––
V
V/°C
R
DS(on)
Static Drain-to-Source On-Resistance
m
V
GS(th)
gfs
I
DSS
Gate Threshold Voltage
Forward Transconductance
Drain-to-Source Leakage Current
V
S
μA
I
GSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
Source-Drain Ratings and Characteristics
Parameter
I
S
Continuous Source Current
(Body Diode)
I
SM
Pulsed Source Current
(Body Diode)
V
SD
Diode Forward Voltage
t
rr
Reverse Recovery Time
Q
rr
Reverse Recovery Charge
t
on
Forward Turn-On Time
nA
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
C
iss
C
oss
C
rss
C
oss
C
oss
C
oss
eff.
nC
ns
pF
Min.
–––
Typ. Max. Units
–––
5.0
A
–––
–––
40
–––
–––
–––
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
–––
15
9.1
1.3
23
14
V
ns
nC
V
DS
= 25V
= 1.0MHz
V
GS
= 0V, V
DS
= 1.0V, = 1.0MHz
V
GS
= 0V, V
DS
= 44V, = 1.0MHz
V
GS
= 0V, V
DS
= 0V to 44V
T
J
= 25°C, I
F
= 3.0A, V
DD
= 28V
di/dt = 100A/μs
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 1mA
V
GS
= 10V, I
D
= 3.0A
V
GS
= 5.0V, I
D
= 3.0A
V
GS
= 4.5V, I
D
= 3.0A
V
DS
= V
GS
, I
D
= 250μA
V
DS
= 25V, I
D
= 3.0A
V
DS
= 55V, V
GS
= 0V
V
DS
= 55V, V
GS
= 0V, T
J
= 125°C
V
GS
= 16V
V
GS
= -16V
MOSFET symbol
V
DD
= 28V
I
D
= 3.0A
R
G
= 56
V
GS
= 5.0V
V
GS
= 0V
T
J
= 25°C, I
S
= 3.0A, V
GS
= 0V
showing the
integral reverse
p-n junction diode.
Conditions
I
D
= 3.0A
V
DS
= 44V
V
GS
= 5.0V