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參數(shù)資料
| 型號(hào)： | IS23SC1604 |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | Low-Cost, Low-Power, Highly Secured 16K Bits (2K x 8) Serial EEPROM(低價(jià)值，低功耗，高可靠性16K位串行EEPROM) |
| 中文描述： | 低成本，低功耗，高度安全的16K的位（2K × 8）串行EEPROM（低價(jià)值，低功耗，高可靠性16K的位串行EEPROM的） |
| 文件頁(yè)數(shù)： | 13/18頁(yè) |
| 文件大小： | 76K |
| 代理商： | IS23SC1604 |
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IS23SC1604
Integrated Silicon Solution, Inc. — 1-800-379-4774
ADVANCE INFORMATION
NV002-0D
01/19/99
13
ISSI
RST
I/O
(mode)
CLK
PGM
FZ, IZ, …
B.
Read
A.
Reset
Operation
Address
Security/Erase
Code Zone
(16-bits)
Security/Erase Code
Attempts Counter
C.
Compare
D.
Read
E.
Write
I.
Read
H.
Verify
F.
Verify
T
CHP
T
CHP
G.
Erase
Out
Security/Erase
Code Flag
Out
Out
Out
In
In
Out Out Out
Out
Out
Out
Out
Out
In
0
0
0
0
0
In
1
1
In
1
0
1
2
In
Figure 8. Security/Erase Key Code Validation
SECURITY/ERASE KEY CODE VALIDATION OPERATION
(For SC, SC1, EZ1, EZ2, EZ3, and EZ4 validation)
A)
Reset the address counter to zero.
B)
Send required number of clock pulses to increment the
address counter to security/erase key code location.
C)
Input the security/erase key code bit by bit for code
validation.
D)
After security/erase key code entry, look for the first
logic ‘1’ bit in security/erase key code attempts counter.
If the ‘1’ bit is found, do not increment the address.
E)
Write a ‘0’ over the ‘1’ bit in security/erase key code
attempts counter at the current bit location.
F)
The chip outputs a ‘0’ after programming is done.
G)
If the security/erase key code validation was successful,
the corresponding comparison flag will be set to ‘1’ on
the rising edge of PGM and the security/erase key
code attempts counter should be erased to reactivate
the eight allowable attempts. (The validation operation
can be aborted by setting CLK HIGH when PGM is still
LOW.)
H)
If the comparison flag were successfully set to ‘1’, the
erasure of the attempt counter would be allowed and
the device would output a ‘1’ on I/O after the erase
operation. Otherwise, the erasure of the attempt counter
would be blocked and a ‘0’ would be output on I/O.
(The content of the attempt counter remains
unchanged.)
I)
On the following edge of the clock, the address counter
is incremented and the state of the next bit is output on
I/O.
Notes:
1. The address counter does not increment from steps
E to H.
2. After eight consecutive failed attempts to validate the
security/erase key code, the corresponding flag will be
locked at ‘0’ permanently.
相關(guān)PDF資料 |
PDF描述 |
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| IS23SC4418 | 1024 x 8 Bits of EEPROM With Programmable Write Protection For Each Byte.(1024 x 8位，每個(gè)字節(jié)帶可編程寫保護(hù)的EEPROM) |
| IS23SC4428 | 1024 x 8 Bits of EEPROM With Programmable Write Protection For Each Byte And Two Bytes of Programmable Security Code(1024 x 8位，每個(gè)字節(jié)帶可編程寫保護(hù)，2字節(jié)可編程安全密碼的EEPROM) |
| IS24C01-2G | 1K-bit/2K-bit/4K-bit/8K-bit/16K-bit 2-WIRE SERIAL CMOS EEPROM |
| IS24C01-2P | 1K-bit/2K-bit/4K-bit/8K-bit/16K-bit 2-WIRE SERIAL CMOS EEPROM |
| IS24C02-2SI | 1K-bit/2K-bit/4K-bit/8K-bit/16K-bit 2-WIRE SERIAL CMOS EEPROM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS23SC1604-P | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16-KBIT SECURED SERIAL EEPROM |
| IS23SC1604-PI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16-KBIT SECURED SERIAL EEPROM |
| IS23SC1604-X2 | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16-KBIT SECURED SERIAL EEPROM |
| IS23SC1604-X2I | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16-KBIT SECURED SERIAL EEPROM |
| IS23SC1604-X3 | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16-KBIT SECURED SERIAL EEPROM |
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