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參數(shù)資料
| 型號： | IS42VS16400C1-10TL |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| 中文描述： | 4M X 16 SYNCHRONOUS DRAM, 8 ns, PDSO54 |
| 封裝： | 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-54 |
| 文件頁數(shù)： | 32/56頁 |
| 文件大?。?/td> | 509K |
| 代理商： | IS42VS16400C1-10TL |
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IS42VS16400C1
ISSI
32
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
10/06/05
CLK
CKE
HIGH - Z
ALL BANKS
BANK SELECT
BANK ADDRESS
CS
RAS
CAS
WE
A0-A9, A11
A10
BA0, BA1
DON'T CARE
CLK
CKE
COMMAND
NOP
NOP
ACTIVE
≥
t
CKS
t
CKS
All banks idle
Enter
power-down mode
Exit power-down mode
t
RCD
t
RAS
t
RC
Input buffers gated
off
PRECHARGE Command
POWER-DOWN
POWER-DOWN
Power-down occurs if CKE is registered LOW coincident
with a NOP or COMMAND INHIBIT when no accesses are
in progress. If power-down occurs when all banks are idle,
this mode is referred to as precharge power-down; if
power-down occurs when there is a row active in either
bank, this mode is referred to as active power-down.
Entering power-down deactivates the input and output
buffers, excluding CKE, for maximum power savings
while in standby. The device may not remain in the power-
down state longer than the refresh period (64ms) since no
refresh operations are performed in this mode.
The power-down state is exited by registering a NOP or
COMMAND INHIBIT and CKE HIGH at the desired clock
edge (meeting t
CKS
). See figure below.
PRECHARGE
The PRECHARGE command (see figure) is used to
deactivate the open row in a particular bank or the open
row in all banks. The bank(s) will be available for a
subsequent row access some specified time (t
RP
) after
the PRECHARGE command is issued. Input A10 deter-
mines whether one or all banks are to be precharged, and
in the case where only one bank is to be precharged,
inputs BA0, BA1 select the bank. When all banks are to be
precharged, inputs BA0, BA1 are treated as “Don’t Care.”
Once a bank has been precharged, it is in the idle state and
must be activated prior to any READ or WRITE com-
mands being issued to that bank.
相關(guān)PDF資料 |
PDF描述 |
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| IS42VS16400C1-10TLI | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-12T | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-12TI | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-12TL | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-12TLI | 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS42VS16400C1-10TLI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-12T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-12TI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-12TL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
| IS42VS16400C1-12TLI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM |
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