參數(shù)資料
型號： IS42VS16400C1-12TI
廠商： INTEGRATED SILICON SOLUTION INC
元件分類： DRAM
英文描述： 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
中文描述： 4M X 16 SYNCHRONOUS DRAM, 9 ns, PDSO54
封裝： 0.400 INCH, PLASTIC, TSOP2-54
文件頁數(shù)： 18/56頁
文件大?。?/td> 509K
代理商： IS42VS16400C1-12TI
IS42VS16400C1
ISSI
18
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
10/06/05
BURST DEFINITION
Burst
Starting Column
Order of Accesses Within a Burst
Length
Address
Type = Sequential
Type = Interleaved
A0
2
0
0-1
0-1
1
1-0
1-0
A1
A0
0
0
0-1-2-3
0-1-2-3
4
0
1
1-2-3-0
1-0-3-2
1
0
2-3-0-1
2-3-0-1
1
1
3-0-1-2
3-2-1-0
A2
A1
A0
0
0
0
0-1-2-3-4-5-6-7
0-1-2-3-4-5-6-7
0
0
1
1-2-3-4-5-6-7-0
1-0-3-2-5-4-7-6
0
1
0
2-3-4-5-6-7-0-1
2-3-0-1-6-7-4-5
8
0
1
1
3-4-5-6-7-0-1-2
3-2-1-0-7-6-5-4
1
0
0
4-5-6-7-0-1-2-3
4-5-6-7-0-1-2-3
1
0
1
5-6-7-0-1-2-3-4
5-4-7-6-1-0-3-2
1
1
0
6-7-0-1-2-3-4-5
6-7-4-5-2-3-0-1
1
1
1
7-0-1-2-3-4-5-6
7-6-5-4-3-2-1-0
Full
Page
(y)
n = A0-A7
Cn, Cn + 1, Cn + 2
Cn + 3, Cn + 4...
…Cn - 1,
Cn…
Not Supported
(location 0-y)
Burst Length
Read and write accesses to the SDRAM are burst ori-
ented, with the burst length being programmable, as
shown in MODE REGISTER DEFINITION. The burst
length determines the maximum number of column loca-
tions that can be accessed for a given READ or WRITE
command. Burst lengths of 1, 2, 4 or 8 locations are
available for both the sequential and the interleaved burst
types, and a full-page burst is available for the sequential
type. The full-page burst is used in conjunction with the
BURST TERMINATE command to generate arbitrary
burst lengths.
Reserved states should not be used, as unknown opera-
tion or incompatibility with future versions may result.
When a READ or WRITE command is issued, a block of
columns equal to the burst length is effectively selected.
All accesses for that burst take place within this block,
meaning that the burst will wrap within the block if a
boundary is reached. The block is uniquely selected by
A1-A7 (x16) when the burst length is set to two; by A2-A7
(x16) when the burst length is set to four; and by A3-A7
(x16) when the burst length is set to eight. The remaining
(least significant) address bit(s) is (are) used to select the
starting location within the block. Full-page bursts wrap
within the page if the boundary is reached.
Burst Type
Accesses within a given burst may be programmed to be
either sequential or interleaved; this is referred to as the
burst type and is selected via bit M3.
The ordering of accesses within a burst is determined by
the burst length, the burst type and the starting column
address, as shown in BURST DEFINITION table.
相關(guān)PDF資料
PDF描述
IS42VS16400C1-12TL 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
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IS43R16160A-5T 16Meg x 16 256-MBIT DDR SDRAM
IS43R16160A-5TL 16Meg x 16 256-MBIT DDR SDRAM
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IS42VS16400C1-12TL 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42VS16400C1-12TLI 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42VS16400E-10TL 功能描述:動態(tài)隨機存取存儲器 64M (4Mx16) 100MHz Commercial Temp RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS42VS16400E-10TLI 制造商:Integrated Silicon Solution Inc 功能描述:
IS42VS16400E-10TL-TR 功能描述:動態(tài)隨機存取存儲器 64M (4Mx16) 100MHz Commercial Temp RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲容量:16 MB 最大時鐘頻率: 訪問時間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
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