參數(shù)資料
型號(hào)： IS42VS16400C1-12TL
廠商： INTEGRATED SILICON SOLUTION INC
元件分類： DRAM
英文描述： 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
中文描述： 4M X 16 SYNCHRONOUS DRAM, 9 ns, PDSO54
封裝： 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-54
文件頁數(shù)： 2/56頁
文件大?。?/td> 509K
代理商： IS42VS16400C1-12TL
IS42VS16400C1
ISSI
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
10/06/05
GENERAL DESCRIPTION
The 64Mb SDRAM is a high speed CMOS, dynamic
random-access memory designed to operate n 1.8V memory
systems containing 67,108,864 bits. Internally configured
as a quad-bank DRAM with a synchronous interface. Each
16,777,216-bit bank is organized as 4,096 rows by 256
columns by 16 bits.
The 64Mb SDRAM includes an AUTO REFRESH MODE,
and a power-saving, power-down mode. All signals are
registered on the positive edge of the clock signal, CLK.
All inputs and outputs are LVTTL compatible.
The 64Mb SDRAM has the ability to synchronously burst
data at a high data rate with automatic column-address
generation, the ability to interleave between internal banks
to hide precharge time and the capability to randomly
change column addresses on each clock cycle during
burst access.
A self-timed row precharge initiated at the end of the burst
sequence is available with the AUTO PRECHARGE
function enabled.
Precharge
one bank while accessing one
of the other three banks will hide the
precharge
cycles and
provide seamless, high-speed, random-access operation.
SDRAM
read and write accesses are burst oriented starting
at a selected location and continuing for a programmed
number of locations in a programmed sequence. The
registration of an ACTIVE command begins accesses,
followed by a READ or WRITE command. The ACTIVE
command in conjunction with address bits registered are
used to select the bank and row to be accessed (BA0, BA1
select the bank; A0-A11 select the row). The READ or
WRITE commands in conjunction with address bits reg-
istered are used to select the starting column location for
the burst access.
Programmable READ or WRITE burst lengths consist of
1, 2, 4 and 8 locations, or full page, with a burst terminate
option.
CLK
CKE
CS
RAS
CAS
WE
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
BA0
BA1
A11
COMMAND
DECODER
&
CLOCK
GENERATOR
MODE
REGISTER
REFRESH
CONTROLLER
REFRESH
COUNTER
SELF
REFRESH
CONTROLLER
ROW
ADDRESS
LATCH
M
COLUMN
ADDRESS LATCH
BURST COUNTER
COLUMN
ADDRESS BUFFER
COLUMN DECODER
DATA IN
BUFFER
DATA OUT
BUFFER
DQM
DQ 0-15
V
DD
/V
DDQ
GND/GNDQ
12
12
8
12
12
8
16
16
16
16
256K
(x 16)
4096
4096
4096
4096
R
MEMORY CELL
ARRAY
BANK 0
SENSE AMP I/O GATE
BANK CONTROL LOGIC
ROW
ADDRESS
BUFFER
FUNCTIONAL BLOCK DIAGRAM
相關(guān)PDF資料
PDF描述
IS42VS16400C1-12TLI 1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS43R16160A-5T 16Meg x 16 256-MBIT DDR SDRAM
IS43R16160A-5TL 16Meg x 16 256-MBIT DDR SDRAM
IS43R16160A-6T 16Meg x 16 256-MBIT DDR SDRAM
IS43R16160A 16Meg x 16 256-MBIT DDR SDRAM
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
IS42VS16400C1-12TLI 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
IS42VS16400E-10TL 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 64M (4Mx16) 100MHz Commercial Temp RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS42VS16400E-10TLI 制造商:Integrated Silicon Solution Inc 功能描述:
IS42VS16400E-10TL-TR 功能描述:動(dòng)態(tài)隨機(jī)存取存儲(chǔ)器 64M (4Mx16) 100MHz Commercial Temp RoHS:否 制造商:ISSI 數(shù)據(jù)總線寬度:16 bit 組織:1 M x 16 封裝 / 箱體:SOJ-42 存儲(chǔ)容量:16 MB 最大時(shí)鐘頻率: 訪問時(shí)間:50 ns 電源電壓-最大:7 V 電源電壓-最小:- 1 V 最大工作電流:90 mA 最大工作溫度:+ 85 C 封裝:Tube
IS42VS16400E-75BLI 制造商:Integrated Silicon Solution Inc 功能描述:
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