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參數(shù)資料
| 型號(hào)： | IS450 |
| 廠商： | Sharp Corporation |
| 英文描述： | OPIC LIGHT DETECTOR WITH BULLT-IN SIGNAL PROCESSING CIRCULT FOR LIGHT MODULATION SYSTEM |
| 中文描述： | 海外私人投資公司與BULLT光檢測(cè)器的信號(hào)的光調(diào)制系統(tǒng)處理CIRCULT |
| 文件頁(yè)數(shù)： | 8/14頁(yè) |
| 文件大?。?/td> | 490K |
| 代理商： | IS450 |
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IS61SP12832
8
Integrated Circuit Solution Inc.
SSR011-0B
READ/WRITE CYCLE SWITCHING CHARACTERISTICS
(Over Operating Range)
-
166
-150
-133
-117
-5
Symbol Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
f
MAX
Clock Frequency
—
166
—
150
—
133
—
117
—
100
MHz
t
KC
Cycle Time
6
—
6.7
—
7.5
—
8.5
—
10
—
ns
t
KH
Clock High Time
2.4
—
2.6
—
2.8
—
3.4
—
4
—
ns
t
KL
Clock Low Time
2.4
—
2.6
—
2.8
—
3.4
—
4
—
ns
t
KQ
Clock Access Time
—
3.5
—
3.8
—
4
—
4
—
5
ns
t
KQX
(1)
Clock High to Output Invalid
1.5
—
1.5
—
1.5
—
1.5
—
2.5
—
ns
t
KQLZ
(1,2)
Clock High to Output Low-Z
0
—
0
—
0
—
0
—
0
—
ns
t
KQHZ
(1,2)
Clock High to Output High-Z
1.5
6
1.5
6.7
1.5
7.5
1.5
8.5
1.5
10
ns
t
OEQ
Output Enable to Output Valid
—
3.5
—
3.5
—
3.8
—
4
—
5
ns
t
OEQX
(1)
Output Disable to Output Invalid
0
—
0
—
0
—
0
—
0
—
ns
t
OELZ
(1,2)
Output Enable to Output Low-Z
0
—
0
—
0
—
0
—
0
—
ns
t
OEHZ
(1,2)
Output Disable to Output High-Z
2
3.5
2
3.5
2
3.8
2
4
2
5
ns
t
AS
Address Setup Time
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
t
SS
Address Status Setup Time
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
t
WS
Write Setup Time
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
t
CES
Chip Enable Setup Time
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
t
AVS
Address Advance Setup Time
1.5
—
1.5
—
1.5
—
1.5
—
1.5
—
ns
t
AH
Address Hold Time
0.5
—
0.5
—
0.5
—
0.5
—
0.5
—
ns
t
SH
Address Status Hold Time
0.5
—
0.5
—
0.5
—
0.5
—
0.5
—
ns
t
WH
Write Hold Time
0.5
—
0.5
—
0.5
—
0.5
—
0.5
—
ns
t
CEH
Chip Enable Hold Time
0.5
—
0.5
—
0.5
—
0.5
—
0.5
—
ns
t
AVH
Address Advance Hold Time
0.5
—
0.5
—
0.5
—
0.5
—
0.5
—
ns
Note:
1. Guaranteed but not 100% tested. This parameter is periodically sampled.
2. Tested with load in Figure 2.
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