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| 型號： | IS45S81600B-7TA |
| 廠商： | INTEGRATED SILICON SOLUTION INC |
| 元件分類： | DRAM |
| 英文描述： | 16Meg x 8, 8Meg x16 128-MBIT SYNCHRONOUS DRAM |
| 中文描述： | 16M X 8 SYNCHRONOUS DRAM, 5.4 ns, PDSO54 |
| 封裝： | PLASTIC, TSOP2-54 |
| 文件頁數(shù)： | 16/59頁 |
| 文件大小： | 593K |
| 代理商： | IS45S81600B-7TA |
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ISSI
16
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A
04/14/06
IS45S81600B, IS45S16800B
AC ELECTRICAL CHARACTERISTICS
(1,2,3)
-7
Symbol
Parameter
Min.
Max.
Units
t
CK3
t
CK2
Clock Cycle Time
CAS
Latency = 3
CAS
Latency = 2
7
—
—
ns
ns
10
t
AC3
t
AC2
Access Time From CLK
CAS
Latency = 3
CAS
Latency = 2
—
—
5.4
6.5
ns
ns
t
CHI
CLK HIGH Level Width
2.5
—
ns
t
CL
CLK LOW Level Width
2.5
—
ns
t
OH3
t
OH2
Output Data Hold Time
CAS
Latency = 3
CAS
Latency = 2
2.7
3
—
—
ns
ns
t
LZ
Output LOW Impedance Time
0
—
ns
t
HZ
Output HIGH Impedance Time
2.7
5.4
ns
t
DS
Input Data Setup Time
(2)
1.5
—
ns
t
DH
Input Data Hold Time
(2)
0.8
—
ns
t
AS
Address Setup Time
(2)
1.5
—
ns
t
AH
Address Hold Time
(2)
0.8
—
ns
t
CKS
CKE Setup Time
(2)
1.5
—
ns
t
CKH
CKE Hold Time
(2)
0.8
—
ns
t
CS
Command Setup Time (
CS
,
RAS
,
CAS
,
WE
, DQM)
(2)
1.5
—
ns
t
CH
Command Hold Time (
CS
,
RAS
,
CAS
,
WE
, DQM)
(2)
0.8
—
ns
t
RC
Command Period (REF to REF / ACT to ACT)
67.5
—
ns
t
RAS
Command Period (ACT to PRE)
45
100K
ns
t
RP
Command Period (PRE to ACT)
20
—
ns
t
RCD
Active Command To Read / Write Command Delay Time
20
—
ns
t
RRD
Command Period (ACT [0] to ACT[1])
14
—
ns
t
DPL
Input Data To Precharge
Command Delay time
14
—
ns
t
DAL
Input Data To Active / Refresh
Command Delay time (During Auto-Precharge)
35
—
ns
t
MRD
Mode Register Program Time
15
—
ns
t
DDE
Power Down Exit Setup Time
7.5
—
ns
t
SRX
Self-Refresh Exit Time
7.5
—
ns
t
T
Transition Time
1
10
ns
t
REF
Refresh Cycle Time (4096)
—
64
ms
Notes:
1. The power-on sequence must be executed before starting memory operation.
2. Measured with t
T
= 1 ns. If clock rising time is longer than 1ns, (t
R
/2 - 0.5) ns should be added to the parameter.
3.
The reference level is 1.4V when measuring input signal timing. Rise and fall times are measured between V
IH
(min.) and V
IL
(max).
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| IS45S81600B-7TA1 | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16Meg x 8, 8Meg x16 128-MBIT SYNCHRONOUS DRAM |
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| IS45S81600E | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:16M x 8, 8M x16 128Mb SYNCHRONOUS DRAM |
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