參數(shù)資料
型號: IS61LV6424
廠商: Integrated Silicon Solution, Inc.
英文描述: 64K x 24 High-Speed CMOS Static RAM(3.3V,64K x 24 高速CMOS靜態(tài)RAM)
中文描述: 64K的× 24高速CMOS靜態(tài)RAM(3.3伏,64K的× 24高速的CMOS靜態(tài)RAM)的
文件頁數(shù): 5/10頁
文件大小: 103K
代理商: IS61LV6424
IS61LV6424
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ISSI
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
12/19/00
5
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(Over Operating Range)
-9
-10
-12
-15
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Unit
t
RC
Read Cycle Time
9
10
12
15
ns
t
AA
Address Access Time
9
10
12
15
ns
t
AV
V/
S
Access Time
9
10
12
15
ns
t
OH
Output Hold Time
From MUX Change
3
3
3
3
ns
t
OHA
Output Hold Time
From Address Change
3
3
3
3
ns
t
ACE
t
ACE
2
CE1
Access Time
CE2 Access Time
9
10
12
15
ns
t
DOE
OE
Access Time
5
5
6
7
ns
t
HZOE
(2)
OE
to High-Z Output
0
3
0
3
0
3
0
3
ns
t
LZOE
(2)
OE
to Low-Z Output
0
0
0
0
ns
t
HZCE
(2)
t
HZCE
2
(2)
CE2 to High-Z Output
CE1
to High-Z Output
0
5
0
5
0
6
0
7
ns
t
LZCE
(2)
t
LZCE
2
(2)
CE2 to Low-Z Output
CE
to Low-Z Output
3
3
3
3
ns
Notes:
1. Test conditions assume signal transition times of 2 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±200 mV from steady-state voltage. Not 100% tested.
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