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參數(shù)資料
| 型號： | IS62VV25616L |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | 256K x 16 LOW VOLTAGE, 1.8V ULTRA LOW POWER CMOS STATIC RAM |
| 中文描述： | 256K × 16低電壓，1.8V的超低功耗的CMOS靜態(tài)RAM |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 65K |
| 代理商： | IS62VV25616L |
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. B
08/07/02
1
IS62VV25616LL
ISSI
Copyright 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
256K x 16 LOW VOLTAGE, 1.8V ULTRA
LOW POWER CMOS STATIC RAM
FEATURES
High-speed access time: 70, 85, ns
CMOS low power operation
– 36 mW (typical) operating
– 9 μW (typical) CMOS standby
Single 1.7V- 2.25 V
DD
power supply
Fully static operation: no clock or refresh
required
Three state outputs
Data control for upper and lower bytes
Industrial temperature available
Available in the 44-pin TSOP (Type II) and
48-pin mini BGA (7.2mm x 8.7mm)
DESCRIPTION
The
ISSI
IS62VV25616LL is a high-speed, 4,194,304 bit
static RAMs organized as 262,144 words by 16 bits. They
are fabricated using
ISSI
's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
For the IS62VV25616LL, when
CE
is HIGH (deselected)
or
CE
is low and both
LB
and
UB
are HIGH, the device
assumes a standby mode at which the power dissipation
can be reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs,
CE
and
OE
. The active LOW
Write Enable (
WE
) controls both writing and reading of the
memory. A data byte allows Upper Byte (
UB
) and Lower
Byte (
LB
) access.
The IS62VV25616LL is packaged in the JEDEC standard
44-pin
TSOP
(Type II)
and
48-pin
mini BGA
(7.2mm x 8.7mm).
FUNCTIONAL BLOCK DIAGRAM
AUGUST 2002
A0-A17
CE
OE
WE
UB
LB
256K x 16
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
V
DD
I/O
DATA
CIRCUIT
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
相關(guān)PDF資料 |
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| IS62VV51216LL | 512K x 16 Low Voltage, 1.8V Ultra Low Power CMOS SRAM(1.8V, 512K x 16 低壓，極低功耗CMOS靜態(tài)RAM) |
| IS62WV10248BLL | 1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| IS62VV25616LL-70M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM |
| IS62VV25616LL-70MI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM |
| IS62VV25616LL-70T | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 16 LOW VOLTAGE, 1.8V ULTRA LOW POWER CMOS STATIC RAM |
| IS62VV25616LL-70TI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:256K x 16 LOW VOLTAGE, 1.8V ULTRA LOW POWER CMOS STATIC RAM |
| IS62VV25616LL-85M | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x16 SRAM |
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