參數(shù)資料
型號: IS64LV6416L-12TA3
廠商: INTEGRATED SILICON SOLUTION INC
元件分類: DRAM
英文描述: 64K x 16 HIGH-SPEED CMOS STATIC RAM WITH 3.3V SUPPLY
中文描述: 64K X 16 STANDARD SRAM, 12 ns, PDSO44
封裝: PLASTIC, TSOP2-44
文件頁數(shù): 1/14頁
文件大小: 94K
代理商: IS64LV6416L-12TA3
IS64LV6416L
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. C
05/02/03
1
Copyright 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
ISSI
FEATURES
High-speed access time: 10, 12 ns
CMOS low power operation:
250 mW (typical) operating
250 μW (typical) standby
TTL compatible interface levels
Single 3.3V power supply
Fully static operation: no clock or refresh
required
Three state outputs
Data control for upper and lower bytes
Industrial temperature available
Temperature offerings:
Option A1: –40
o
C to +85
o
C
Option A2: –40
o
C to +105
o
C
Option A3: –40
o
C to +125
o
C
DESCRIPTION
The
ISSI
IS64LV6416L is a high-speed, 1,048,576-bit
static RAM organized as 65,536 words by 16 bits. It is
fabricated using
ISSI
's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields access times
as fast as 10 ns with low power consumption.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip
Enable and Output Enable inputs,
CE
and
OE
. The active
LOW Write Enable (
WE
) controls both writing and reading
of the memory. A data byte allows Upper Byte (
UB
) and
Lower Byte (
LB
) access.
The IS64LV6416L is packaged in the JEDEC standard
44-pin TSOP-II, and 48-pin mini BGA (6mm x 8mm).
FUNCTIONAL BLOCK DIAGRAM
MAY 2003
A0-A15
CE
OE
WE
UB
LB
64K x 16
MEMORY ARRAY
DECODER
COLUMN I/O
CONTROL
CIRCUIT
GND
V
DD
I/O
DATA
CIRCUIT
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
64K x 16 HIGH-SPEED CMOS STATIC
RAM WITH 3.3V SUPPLY
相關(guān)PDF資料
PDF描述
IS64WV102416BLL 1M x 16 HIGH-SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY
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