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參數(shù)資料
| 型號： | IS80C31 |
| 廠商： | Integrated Silicon Solution, Inc. |
| 英文描述： | CMOS SINGLE CHIP 8-BIT MICROCONTROLLER |
| 中文描述： | CMOS單芯片8位微控制器 |
| 文件頁數(shù)： | 12/43頁 |
| 文件大?。?/td> | 337K |
| 代理商： | IS80C31 |
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IS80C51
IS80C31
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
MC003-1D
11/19/98
ISSI
IP:
Interrupt Priority Register. Bit Addressable.
7
—
6
—
5
—
4
3
2
1
0
PS
PT1
PX1
PT0 PX0
Register Description:
—
IP.7
—
IP.6
—
IP.5
PS
IP.4
PT1
IP.3
PX1
IP.2
PT0
IP.1
PX0
IP.0
Not implemented, reserve for future use
(3)
Not implemented, reserve for future use
(3)
Not implemented, reserve for future use
(3)
Defines Serial Port interrupt priority level
Defines Timer 1 interrupt priority level
Defines External Interrupt 1 priority level
Defines Timer 0 interrupt priority level
Defines External Interrupt 0 priority level
Notes:
1. In order to assign higher priority to an interrupt the
coresponding bit in the IP register must be set to 1. While
an interrupt service is in progress, it cannot be interrupted
by a lower or same level interrupt.
2. Priority within level is only to resolve simultaneous
requests of the same priority level. From high to low,
interrupt sources are listed below:
IE0
TF0
IE1
TF1
RI or TI
3.
User software should not write 1s to reserved bits. These
bits may be used in future products to invoke new features.
TCON:
Timer/Counter Control Register. Bit Addressable
7
TF1 TR1
6
5
4
3
2
1
0
TF0
TR0
IE1
IT1
IE0
IT0
Register Description:
TF1
TCON.7
Timer 1 overflow flag. Set by hardware
when the Timer/Counter 1 overflows.
Cleared by hardware as processor
vectors to the interrupt service routine.
Timer 1 run control bit. Set/Cleared by
software to turn Timer/Counter 1 ON/
OFF.
Timer 0 overflow flag. Set by hardware
when the Timer/Counter 0 overflows.
Cleared by hardware as processor
vectors to the interrupt service routine.
Timer 0 run control bit. Set/Cleared by
software to turn Timer/Counter 0 ON/
OFF.
External Interrupt 1 edge flag. Set by
hardware when the External Interrupt
edge is detected. Cleared by hardware
when interrupt is processed.
Interrupt 1 type control bit. Set/Cleared
by software specify falling edge/low level
triggered External Interrupt.
External Interrupt 0 edge flag. Set by
hardware when the External Interrupt
edge is detected. Cleared by hardware
when interrupt is processed.
Interrupt 0 type control bit. Set/Cleared
by software specify falling edge/low level
triggered External Interrupt.
TR1
TCON.6
TF0
TCON.5
TR0
TCON.4
IE1
TCON.3
IT1
TCON.2
IE0
TCON.1
IT0
TCON.0
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| IS80C31-12PL | CMOS SINGLE CHIP 8-BIT MICROCONTROLLER |
| IS80C31-12PLI | CMOS SINGLE CHIP 8-BIT MICROCONTROLLER |
| IS80C31-12PQ | CMOS SINGLE CHIP 8-BIT MICROCONTROLLER |
| IS80C31-12PQI | CMOS SINGLE CHIP 8-BIT MICROCONTROLLER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| IS80C31-12 | 制造商:TEMIC 功能描述:MicroController, 8-Bit, 44 Pin, Plastic, PLCC |
| IS80C31-12PL | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP 8-BIT MICROCONTROLLER |
| IS80C31-12PLI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP 8-BIT MICROCONTROLLER |
| IS80C31-12PQ | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP 8-BIT MICROCONTROLLER |
| IS80C31-12PQI | 制造商:ISSI 制造商全稱:Integrated Silicon Solution, Inc 功能描述:CMOS SINGLE CHIP 8-BIT MICROCONTROLLER |
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