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參數(shù)資料
| 型號： | IS9108-11CS14LF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | XO, clock |
| 英文描述： | 100.23 MHz, OTHER CLOCK GENERATOR, PDSO14 |
| 封裝： | SOIC-14 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 1089K |
| 代理商： | IS9108-11CS14LF |
Electrical Characteristics at 3.3V
(Operating VDD = +3.0V to +3.7V; TA =0
°C to 70°C unless otherwise stated)
DC Characteristics
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Input Low Voltage
VIL
-
0.20VDD
V
Input High Voltage
VIH
0.7VDD
-
V
Input Low Current
IIL
VIN=0V
-
2.5
7.0
A
Input High Current
IIH
VIN=VDD
-2.0
-
2.0
A
Output Low Voltage
VOL
IOL=6mA
-
0.15
0.1
V
Output High Voltage
VOH
IOH=-5mA
0.85
0.92
-
V
Output Low Current
IOL
VOL=0.2VDD
15.0
22.0
-
mA
Output High Current
IOH
VOL=0.7VDD
-
-17.0
-10.0
mA
Supply Current
ICC
Unloaded, 50 MHz
-
22.0
40.0
mA
Supply Current
ICC
(PD low)
Unload, Logic Inputs 000
-
13.0
40.0
A
Supply Current
ICC
(PD low)
Unload, Logic Inputs 111
-
4.0
12.0
A
Pull-up Resistor
Rpu
-
550.0
900.0
k ohms
AC Characteristics
Rise Time 20% to 80%, Note 1
Tr
15pf load
-
2.2
3.5
ns
Fall Time 80% to 20%
Tf
15pf load
-
1.2
2.5
ns
Duty Cycle
Dt
15pf load @ 50%
40.0
46.0
60.0
%
Jitter, One Sigma
Tjis
From 25 to 85 MHz
-
50.0
150.0
ps
Jitter, One Sigma
Tjis
From 14 to 20 MHz
100.0
200.0
ps
Jitter, One Sigma
Tjis
From 14 to Below
0.4
1.0
%
Jitter, Absolute
Tjab
From 25 to 85 MHz
-250.0
250.0
ps
Jitter, Absolute
Tjab
From 14 to 20 MHz
-500.0
500.0
ps
Jitter, Absolute
Tjab
From 14 to Below
1.0
3.0
%
Input Frequency
Fi
13.3
14.3
15.3
MHz
Output Frequency
Fo
2.0
-
90.0
MHz
Power-up Time, Note 1
Tpu
-
7.58
18.0
ms
Transition Time, Note 1
Tft
8 to 66.6 MHz
-
6.0
13.0
ms
Parameter is guaranteed by design and characterization.
AV9108
6
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