參數(shù)資料
型號(hào)： ISL12008IB8Z-T
廠(chǎng)商： Intersil
文件頁(yè)數(shù)： 9/19頁(yè)
文件大?。?/td> 0K
描述： IC RTC I2C LO-POWER 8-SOIC
標(biāo)準(zhǔn)包裝： 2,500
類(lèi)型： 時(shí)鐘/日歷
特點(diǎn)： 警報(bào)器，閏年
時(shí)間格式： HH:MM:SS:hh（24 小時(shí)）
數(shù)據(jù)格式： YY-MM-DD-dd
接口： I²C，2 線(xiàn)串口
電源電壓： 2.7 V ~ 5.5 V
電壓 - 電源，電池： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 8-SOIC（0.154"，3.90mm 寬）
供應(yīng)商設(shè)備封裝： 8-SOIC
包裝： 帶卷 (TR)
17
FN6690.1
September 26, 2008
If full industrial temperature compensation is desired in an
ISL12008 circuit, then both the DTR and ATR registers will
need to be utilized (total correction range = -97.0695ppm to
+206.139ppm).
A system to implement temperature compensation would
consist of the ISL12008, a temperature sensor, and a
microcontroller. These devices may already be in the system
so the function will just be a matter of implementing software
and performing some calculations. Fairly accurate
temperature compensation can be implemented just by
using the crystal manufacturer’s specifications for the
turnover temperature T0 and the drift coefficient (β). The
formula for calculating the oscillator adjustment necessary is
Equation 4:
Once the temperature curve for a crystal is established, then
the designer should decide at what discrete temperatures
the compensation will change. Since drift is higher at
extreme temperatures, the compensation may not be
needed until the temperature is greater than +20°C from T0.
A sample curve of the ATR setting vs Frequency Adjustment
for the ISL12008 and a typical RTC crystal is given in
Figure 16. This curve may vary with different crystals, so it is
good practice to evaluate a given crystal in an ISL12008
circuit before establishing the adjustment values.
This curve is then used to figure what ATR and DTR settings
are used for compensation. The results would be placed in a
lookup table for the microcontroller to access.
Layout Considerations
The crystal input at X1 has a very high impedance, and
oscillator circuits operating at low frequencies (such as
32.768kHz) are known to pick up noise very easily if layout
precautions are not followed. Most instances of erratic
clocking or large accuracy errors can be traced to the
susceptibility of the oscillator circuit to interference from
adjacent high speed clock or data lines. Careful layout of the
RTC circuit will avoid noise pickup and insure accurate
clocking.
Figure 17 shows a suggested layout for the ISL12008 device
using a surface mount crystal. Two main precautions should
be followed:
1. Do not run the serial bus lines or any high speed logic
lines in the vicinity of the crystal. These logic level lines
can induce noise in the oscillator circuit to cause
misclocking.
2. Add a ground trace around the crystal with one end
terminated at the chip ground. This will provide
termination for emitted noise in the vicinity of the RTC
device.
In addition, it is a good idea to avoid a ground plane under
the X1 and X2 pins and the crystal, as this will affect the load
capacitance and therefore the oscillator accuracy of the
circuit. If the FT/OUT pin is used as a clock, it should be
routed away from the RTC device as well. The traces for the
VBAT and VCC pins can be treated as a ground, and should
be routed around the crystal.
Super Capacitor Backup
The ISL12008 device provides a VBAT pin which is used for
a battery backup input. A super capacitor can be used as an
alternative to a battery in cases where shorter backup times
are required. Since the battery backup supply current
required by the ISL12008 is extremely low, it is possible to
get months of backup operation using a super capacitor.
Typical capacitor values are a few F to 1F or more,
depending on the application.
If backup is only needed for a few minutes, then a small
inexpensive electrolytic capacitor can be used. For extended
periods, a low leakage, high capacity super capacitor is the
best choice. These devices are available from such vendors
as Panasonic and Murata. The main specifications include
working voltage and leakage current. If the application is for
charging the capacitor from a +5V ±5% supply with a signal
diode, then the voltage on the capacitor can vary from ~4.5V
to slightly over 5.0V. A capacitor with a rated WV of 5.0V
may have a reduced lifetime if the supply voltage is slightly
high. The leakage current should be as small as possible.
For example, a super capacitor should be specified with
leakage of well below 1A. A standard electrolytic capacitor
with DC leakage current in the microamps will have a
severely shortened backup time.
Adjustment(ppm)
T
0
–
()2
=
β
(EQ. 4)
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
0
5
10 15 20 25 30 35 40 45 50 55 60
ATR SETTING
PP
M
ADJUS
T
M
E
N
T
FIGURE 16. ATR SETTING vs OSCILLATOR FREQUENCY
ADJUSTMENT
FIGURE 17. SUGGESTED LAYOUT FOR ISL12008 AND
CRYSTAL
ISL12008
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