17 FN6668.9 June 20, 2012 BATTERY LEVEL MONITOR TRIP BITS (VB75TP <2:0>) Three bits select the second alarm (7" />
參數(shù)資料
型號： ISL12022MIBZ
廠商： Intersil
文件頁數(shù)： 9/31頁
文件大?。?/td> 0K
描述： IC RTC/CALENDAR TEMP SNSR 20SOIC
應(yīng)用說明： Addressing Power Issues in Real Time Clock Appls
產(chǎn)品培訓(xùn)模塊： Solutions for Industrial Control Applications
標(biāo)準(zhǔn)包裝： 760
類型： 時鐘/日歷
特點： 警報器，夏令時，閏年，SRAM
存儲容量： 128B
時間格式： HH:MM:SS（12/24 小時）
數(shù)據(jù)格式： YY-MM-DD-dd
接口： I²C，2 線串口
電源電壓： 2.7 V ~ 5.5 V
電壓 - 電源，電池： 1.8 V ~ 5.5 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 20-SOIC W
包裝： 管件
ISL12022M
17
FN6668.9
June 20, 2012
BATTERY LEVEL MONITOR TRIP BITS (VB75TP <2:0>)
Three bits select the second alarm (75% of Nominal VBAT) level for
the battery voltage monitor. There are total of 7 levels that could be
selected for the second alarm. Any of the of levels could be selected
as the second alarm with no reference as to nominal Battery voltage
level. See Table 9.
Initial AT and DT Setting Register (ITRO)
These bits are used to trim the initial error (at room temperature)
of the crystal. Both Digital Trimming (DT) and Analog Trimming
(AT) methods are available. The digital trimming uses clock pulse
skipping and insertion for frequency adjustment. Analog
trimming uses load capacitance adjustment to pull the oscillator
frequency. A range of +62.5ppm to -61.5ppm is possible with
combined digital and analog trimming.
Initial values for the ITR0 register are preset internally and recalled
to RAM registers on power-up. These values are pre-set in device
production and are READ-ONLY. They cannot be overwritten by the
user. If an application requires adjustment of the IATR bits outside
the preset values, the user should contact Intersil.
AGING AND INITIAL TRIM DIGITAL TRIMMING BITS
(IDTR0<1:0>)
These bits allow ±30.5ppm initial trimming range for the crystal
frequency. This is meant to be a coarse adjustment if the range
needed is outside that of the IATR control. See Table 10. The
IDTR0 register should only be changed while the TSE (Temp
Sense Enable) bit is “0”.
The ISL12022M has a preset Initial Digital Trimming value
corresponding to the crystal in the module. This value is recalled
on initial power-up and is READ-ONLY. It cannot be overwritten by
the user.
AGING AND INITIAL ANALOG TRIMMING BITS
(IATR0<5:0>)
The Initial Analog Trimming Register allows +32ppm to -31ppm
adjustment in 1ppm/bit increments. This enables fine frequency
adjustment for trimming initial crystal accuracy error or to
correct for aging drift.
The ISL12022M has a preset Initial Analog Trimming value
corresponding to the crystal in the module. This value is recalled on
initial power-up, is preset in device production and is READ-ONLY. It
cannot be overwritten by the user.
TABLE 8. VB85T ALARM LEVEL
VB85Tp2
VB85Tp1
VB85Tp0
BATTERY ALARM TRIP
LEVEL
(V)
00
0
2.125
0
1
2.295
0
1
0
2.550
0
1
2.805
1
0
3.060
1
0
1
4.250
1
0
4.675
TABLE 9. BATTERY LEVEL MONITOR TRIP BITS (VB75TP <2:0>)
VB75Tp2
VB75Tp1
VB75Tp0
BATTERY ALARM TRIP
LEVEL
(V)
000
1.875
0
1
2.025
0
1
0
2.250
011
2.475
1
0
2.700
1
0
1
3.750
110
4.125
TABLE 10. IDTR0 TRIMMING RANGE
IDTR01
IDTR00
TRIMMING RANGE
00
Default/Disabled
0
1
+30.5ppm
10
0ppm
1
-30.5ppm
TABLE 11. INITIAL AT AND DT SETTING REGISTER
ADDR
7
6
5432
10
0Bh IDTR01 IDTR00 IATR05 IATR04 IATR03 IATR02 IATR01 IATR00
TABLE 12. IATRO TRIMMING RANGE
IATR05
IATR04
IATR03
IATR02
IATR01
IATR00
TRIMMING
RANGE
0
0000
0
+32
00
000
1
+31
00
001
0
+30
00
001
1
+29
00
010
0
+28
00
010
1
+27
00
011
0
+26
00
011
1
+25
00
100
0
+24
00
100
1
+23
00
101
0
+22
00
101
1
+21
00
110
0
+20
00
110
1
+19
00
111
0
+18
00
111
1
+17
01
000
0
+16
01
000
1
+15
01
001
0
+14
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