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參數(shù)資料
| 型號： | ISL12059IBZ-T |
| 廠商： | Intersil |
| 文件頁數(shù)： | 8/11頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC RTC/CALENDAR I2C-BUS 8-SOIC |
| 標(biāo)準包裝： | 2,500 |
| 類型： | 時鐘/日歷 |
| 特點： | 閏年 |
| 時間格式： | HH:MM:SS（24 小時） |
| 數(shù)據(jù)格式： | YY-MM-DD-dd |
| 接口： | I²C，2 線串口 |
| 電源電壓： | 1.8 V ~ 3.6 V |
| 電壓 - 電源，電池： | 1.4 V ~ 1.8 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
6
FN6757.0
June 15, 2009
General Description
The ISL12059 device is a low power real time clock with
clock/calendar, and 512Hz/Digital Output function.
The oscillator uses an external, low-cost 32.768kHz crystal.
The real time clock tracks time with separate registers for
hours, minutes, and seconds. The device has calendar
registers for date, month, year and day of the week. The
calendar is accurate through 2099, with automatic leap year
correction.
Pin Description
X1, X2
The X1 and X2 pins are the input and output, respectively, of
an inverting amplifier. An external 32.768kHz quartz crystal
is used with the ISL12059 to supply a timebase for the real
time clock. Refer to Figure 4.
The device can also be driven directly from a 32.768kHz
square wave source with peak-to-peak voltage from 0V to
VDD at X1 pin with X2 pin floating.
FT/OUT(512Hz Frequency Output/Logic Output)
This dual function pin can be used as a 512Hz frequency
output or a simple digital output control via I2C. The FT/OUT
mode is selected via the OUT and FT control bits of the
control/status register (address 07h). The FT/OUT pin is an
open drain output that requires the use of a pull-up resistor,
and it can accept a pull-up voltage up to 5.5V. This pin is at
high impedance at power-up.
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of the
device. The input buffer on this pin is always active (not gated).
The SCL pin can accept a logic high voltage up to 5.5V.
Serial Data (SDA)
SDA is a bi-directional pin used to transfer data into and out
of the device. It has an open drain output and may be ORed
with other open drain or open collector outputs. The input
buffer is always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor,
and it can accept a pull-up voltage up to 5.5V. The output
circuitry controls the fall time of the output signal with the use
of a slope controlled pull-down. The circuit is designed for
400kHz I2C interface speeds.
NOTE: Parts will work with SDA pull-up voltage above the VPULLUP
limit but the tAA and tFin the I
2C parameters are not guaranteed.
VDD, GND
Chip power supply and ground pins. The device will have full
operation with a power supply from 1.8V to 3.6V, and
timekeeping function with a power supply from 1.4V to 3.6V.
A 0.1F decoupling capacitor is recommended on the VDD
pin to ground.
NC (No Connection)
The NC pin is not connected to the die. The pin can be
connected to GND or left floating.
Functional Description
Real Time Clock Operation
The Real Time Clock (RTC) uses an external 32.768kHz quartz
crystal to maintain an accurate internal representation of
second, minute, hour, day of week, date, month, and year. The
RTC also has leap-year correction. The RTC also corrects for
months having fewer than 31 days. The clock will begin
incrementing after power-up with valid oscillator condition.
Typical Performance Curves Temperature is +25°C unless otherwise specified.
FIGURE 2. IDD1 vs VDD
FIGURE 3. IDD1 vs TEMPERATURE
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1.41.9
2.42.9
3.4
VDD (V)
I DD
1(A)
0.2
0.4
0.6
0.8
1.0
-40
-20
0
204060
80
TEMPERATURE (°C)
3.0
1.8
1.4
3.6
I DD
1(A)
FIGURE 4. RECOMMENDED CRYSTAL CONNECTION
X1
X2
ISL12059
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