參數(shù)資料
型號: ISL22102IV20Z
廠商: Intersil
文件頁數(shù): 1/11頁
文件大?。?/td> 0K
描述: IC POT DUAL 32TAP 20-TSSOP
標(biāo)準(zhǔn)包裝: 740
系列: XDCP™
接片: 32
電阻(歐姆): 18.5k
電路數(shù): 2
溫度系數(shù): 標(biāo)準(zhǔn)值 10 ppm/°C
存儲器類型: 易失
接口: 2 線按鈕
電源電壓: 2.7 V ~ 5.5 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
1
FN6788.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2008, 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL22102
Dual, Audio, Push-button Controlled Potentiometer (XDCP)
32 Tap, Push-button, Dual Audio
Logarithmic Potentiometer with Buffer
Amplifiers and Audio Detection
The ISL22102 integrates two digitally controlled
potentiometers (DCP) with buffered wiper outputs and an
internal bias voltage generator (VB) on a monolithic CMOS
integrated circuit. The wiper position is adjusted by the user
through simple Up and Down push buttons, ideal for stereo
volume control in audio applications.
Each potentiometer is implemented using 31 polysilicon
resistors in a logarithmic array. Between each of the
resistors are tap points connected to the wiper terminal
through switches. When powered up, the wipers are reset to
the -20dB position.
In addition to the ISL22102’s low noise design, the ISL22102
also contains a zero-crossing detection circuitry to further
minimize click and pop noise during volume transition.
The internal VB generator of the ISL22102 provides a
precision middle scale voltage reference that reduces
external circuitry and simplifies application design.
The ISL22102 implements two power saving techniques for
power critical applications. It is a Standby Mode that can be
enabled to reduce the power consumption of the part when
DCP is not in use. The part also has Audio Detection
circuitry that provides an indication FLAG to external devices
and services. The FLAG can be delayed through D0, D1 and
D2 pin configuration. By connecting the FLAG to the standby
pin (SB), it will automatically put the part into Standby Mode.
Pinout
Features
Dual Audio Control – Two 32 Taps Log Pots
Buffered Wiper Outputs
Audio Detection with Threshold Input and Controlled
Delay
Zero Amplitude Wiper Switching (ZAWS)
Simple Push-button Interface
Auto Increment/decrement After 1s Button Press
Standby Mode
Mute Function
Total Resistance: 18.5k
Ω each DCP (Typical)
Voltage Operation
- VCC = 2.7V to 5.5V
- AVCC = 2.7V to 5.5V
Temp Range = -40°C to +85°C
Package Options
- 20 Ld TSSOP
-20 Ld QFN
Pb-Free (RoHS Compliant)
Audio Performance
0dB to -72dB Volume Control
-90dB Mute
SNR: -90dB
THD+N: 0.01% @ 1kHz
Crosstalk Rejection: -100dB @ 1kHz
Channel-to-Channel Variation: ±0.1dB
Mid point 3dB-Cutoff: 100kHz
Applications
Set Top Boxes
Stereo Amplifiers
DVD Players
Portable Audio Products
ISL22102
(20 LD QFN)
TOP VIEW
UP
FL
AG
D2
SB
D1
LEF
T
_
O
UT
VB
RIGH
T_
OUT
CB
RIGHT_IN
DN
VCC
AVCC
MUTE
LEFT_IN
D0
GND
HPB
VTH
HPA
1
2
3
4
5
67
8
9
10
15
14
13
12
11
20
19
18
17
16
Data Sheet
January 14, 2010
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