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參數(shù)資料
| 型號(hào)： | ISL22329UFU10Z-TK |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 13/13頁(yè) |
| 文件大小： | 0K |
| 描述： | IC POT DGTL 128TP LN LP 10-MSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | XDCP™ |
| 接片： | 128 |
| 電阻（歐姆）： | 50k |
| 電路數(shù)： | 2 |
| 溫度系數(shù)： | 標(biāo)準(zhǔn)值 ±80 ppm/°C |
| 存儲(chǔ)器類(lèi)型： | 非易失 |
| 接口： | I²C（設(shè)備位址） |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
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9
FN6330.2
September 4, 2009
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bi-directional serial data input/output pin for
I2C interface. It receives device address, operation code,
wiper address and data from an I2C external master device
at the rising edge of the serial clock SCL, and it shifts out
data after each falling edge of the serial clock.
SDA requires an external pull-up resistor, since it is an open
drain input/output.
SERIAL CLOCK (SCL)
This is the serial clock input of the I2C serial interface. SCL
requires an external pull-up resistor, since it is an open drain
input.
DEVICE ADDRESS (A2 - A0)
The address inputs are used to set the least significant 3 bits
of the 7-bit I2C interface slave address. A match in the slave
address serial data stream must match with the Address
input pins in order to initiate communication with the
ISL22329. A maximum of 8 ISL22329 devices may occupy
the I2C serial bus.
Principles of Operation
The ISL22329 is an integrated circuit incorporating two
DCPs with their associated registers, non-volatile memory
and an I2C serial interface providing direct communication
between a host and the potentiometers and memory. The
resistor arrays are comprised of individual resistors
connected in series. At either end of the array and between
each resistor is an electronic switch that transfers the
potential at that point to the wiper.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions.
When the device is powered down, the last value stored in
IVRi will be maintained in the non-volatile memory. When
power is restored, the contents of the IVRi are recalled and
loaded into the corresponding WRi to set the wipers to the
initial value.
DCP Description
Each DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of each
DCP are equivalent to the fixed terminals of a mechanical
potentiometer and internally connected to Vcc and GND.
The RW pin of each DCP is connected to intermediate
nodes, and is equivalent to the wiper terminal of a
mechanical potentiometer. The position of the wiper terminal
within the DCP is controlled by volatile Wiper Register (WR).
Each DCP has its own WR. When the WR of a DCP contains
all zeroes (WR[6:0] = 00h), its wiper terminal (RW) is closest
to GND. When the WR register of a DCP contains all ones
(WR[6:0] = 7Fh), its wiper terminal (RW) is closest to VCC.
As the value of the WR increases from all zeroes (0) to all
ones (127 decimal), the wiper moves monotonically from the
position closest to GND to the closest to VCC.
While the ISL22329 is being powered up, all WRs are reset
to 40h (64 decimal), which locates RW roughly at the center
between GND and VCC. After the power supply voltage
becomes large enough for reliable non-volatile memory
reading, all WRs will be reload with the value stored in
corresponding non-volatile Initial Value Registers (IVRs).
The WRs can be read or written to directly using the I2C
serial interface as described in the following sections. The
I2C interface Address Byte has to be set to 00h or 01h to
access the WR of DCP0 or DCP1 respectively.
Memory Description
The ISL22329 contains seven non-volatile and three volatile
8-bit registers. The memory map of ISL22329 is on Table 1.
The two non-volatile registers (IVRi) at address 0 and 1,
contain initial wiper value and volatile registers (WRi) contain
current wiper position. In addition, five non-volatile General
Purpose registers from address 2 to address 6 are available.
The non-volatile IVRi and volatile WRi registers are
accessible with the same address.
The Access Control Register (ACR) contains information and
control bits described in Table 2. The VOL bit at access
control register (ACR[7]) determines whether the access is to
wiper registers WRi or initial value registers IVRi.
If VOL bit is 0, the non-volatile IVRi registers are accessible.
If VOL bit is 1, only the volatile WRi are accessible. Note,
value is written to IVRi register also is written to the
corresponding WRi. The default value of this bit is 0.
The SHDN bit (ACR[6]) disables or enables Shutdown
mode. This bit is logically ANDed with SHDN pin. When this
bit is 0, DCPs are in Shutdown mode. Default value of SHDN
bit is 1.
TABLE 1. MEMORY MAP
ADDRESS
NON-VOLATILE
VOLATILE
8—
ACR
7
Reserved
6
5
4
3
2
General Purpose
Not Available
1
0
IVR1
IVR0
WR1
WR0
TABLE 2. ACCESS CONTROL REGISTER (ACR)
VOL
SHDN
WIP
00000
ISL22329
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| ISL22329WFU10Z | 功能描述:IC POT DGTL 128TP LN LP 10-MSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:32 電阻（歐姆）:50k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 50 ppm/°C 存儲(chǔ)器類(lèi)型:易失 接口:3 線(xiàn)串行（芯片選擇，遞增，增/減） 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 供應(yīng)商設(shè)備封裝:TSOT-23-6 包裝:帶卷 (TR) |
| ISL22329WFU10Z-TK | 功能描述:IC POT DGTL 128TP LN LP 10-MSOP RoHS:是 類(lèi)別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)字電位器 系列:XDCP™ 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 接片:32 電阻（歐姆）:50k 電路數(shù):1 溫度系數(shù):標(biāo)準(zhǔn)值 50 ppm/°C 存儲(chǔ)器類(lèi)型:易失 接口:3 線(xiàn)串行（芯片選擇，遞增，增/減） 電源電壓:2.7 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類(lèi)型:表面貼裝 封裝/外殼:SOT-23-6 細(xì)型，TSOT-23-6 供應(yīng)商設(shè)備封裝:TSOT-23-6 包裝:帶卷 (TR) |
| ISL22343 | 制造商:INTERSIL 制造商全稱(chēng):Intersil Corporation 功能描述:Quad Digitally Controlled Potentiometer XDCP |
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