參數(shù)資料
型號: ISL22343UFV20Z
廠商: Intersil
文件頁數(shù): 6/18頁
文件大小: 0K
描述: IC POT DGTL 256TP LN LP 20-TSSOP
標準包裝: 740
系列: XDCP™
接片: 256
電阻(歐姆): 50k
電路數(shù): 4
溫度系數(shù): 標準值 ±45 ppm/°C
存儲器類型: 非易失
接口: I²C(設(shè)備位址)
電源電壓: 2.25 V ~ 5.5 V
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 20-TSSOP
包裝: 管件
14
FN6423.1
March 13, 2008
SCL is HIGH (see Figure 16). A STOP condition at the end
of a read operation, or at the end of a write operation places
the device in its standby mode.
An ACK (Acknowledge) is a software convention used to
indicate a successful data transfer. The transmitting device,
either master or slave, releases the SDA bus after
transmitting eight bits. During the ninth clock cycle, the
receiver pulls the SDA line LOW to acknowledge the
reception of the eight bits of data (see Figure 17).
The ISL22343 responds with an ACK after recognition of a
START condition followed by a valid Identification Byte, and
once again after successful receipt of an Address Byte. The
ISL22343 also responds with an ACK after receiving a Data
Byte of a write operation. The master must respond with an
ACK after receiving a Data Byte of a read operation
A valid Identification Byte contains 1010 as four MSBs, and
the following three bits matching the logic values present at
pins A2, A1 and A0. The LSB is the Read/Write bit. Its value
is “1” for a Read operation and “0” for a Write operation (See
Table 3).
TABLE 3. IDENTIFICATION BYTE FORMAT
1010
A2
A1
A0
R/W
(MSB)
(LSB)
LOGIC VALUES AT PINS A2, A1 AND A0, RESPECTIVELY
SDA
SCL
START
DATA
STOP
STABLE
CHANGE
DATA
STABLE
FIGURE 16. VALID DATA CHANGES, START AND STOP CONDITIONS
SDA OUTPUT FROM
TRANSMITTER
SDA OUTPUT FROM
RECEIVER
8
1
9
START
ACK
SCL FROM
MASTER
HIGH IMPEDANCE
FIGURE 17. ACKNOWLEDGE RESPONSE FROM RECEIVER
HIGH IMPEDANCE
S
T
A
R
T
S
T
O
P
IDENTIFICATION
BYTE
ADDRESS
BYTE
DATA
BYTE
A
C
K
SIGNALS FROM
THE MASTER
SIGNALS FROM
THE SLAVE
A
C
K
10
1
00
A
C
K
WRITE
SIGNAL AT SDA
00 0 0
A0
A1
0
FIGURE 18. BYTE WRITE SEQUENCE
A2
ISL22343
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